Texas Instruments TMS320C6747 DSP Benutzerhandbuch
3.21 HC Root Hub Status Register (HCRHSTATUS)
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Registers
The HC root hub status register (HCRHSTATUS) reports the USB host controller root hub status.
HCRHSTATUS is shown in
HCRHSTATUS is shown in
and described in
Figure 22. HC Root Hub Status Register (HCRHSTATUS)
31
30
18
17
16
CRWE
Reserved
OCIC
LPSC
R/W-0
R-0
R/W-0
R/W-0
15
14
2
1
0
DRWE
Reserved
OCI
LPS
R/W-0
R-0
R-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22. HC Root Hub Status Register (HCRHSTATUS) Field Descriptions
Bit
Field
Value
Description
31
CRWE
Clear remote wake-up enable.
0
No effect..
1
Clears the device remote wake-up enable bit.
30-18
Reserved
0
Reserved
17
OCIC
Overcurrent indication change. This bit is automatically set when the overcurrent indicator bit changes.
This bit has no relationship to the OTG controller register bits that relate to VBUS. System software can
update this register to simplify host controller driver and/or OTG driver coding.
This bit has no relationship to the OTG controller register bits that relate to VBUS. System software can
update this register to simplify host controller driver and/or OTG driver coding.
0
No effect.
1
Clears this bit.
16
LPSC
0
Local power status change. Because the root hub does not support the local power status feature, this
bit defaults to 0 and has no effect. This bit has no relationship to the OTG controller register bits that
relate to VBUS. System software can update this register to simplify host controller driver and/or OTG
driver coding.
bit defaults to 0 and has no effect. This bit has no relationship to the OTG controller register bits that
relate to VBUS. System software can update this register to simplify host controller driver and/or OTG
driver coding.
15
DRWE
Device remote wake-up enable.
When 1, this bit enables a connect status change event to be treated as a resume event, which causes
a transition from USB suspend to USB resume state and sets the resume detected interrupt status bit.
a transition from USB suspend to USB resume state and sets the resume detected interrupt status bit.
When 0, connect status change events do not cause a transition from USB suspend to USB resume
state and the resume detected interrupt is not changed.
state and the resume detected interrupt is not changed.
0
A write of 0 has no effect.
1
A write of 1 sets the device remote wake-up enable bit.
14-2
Reserved
0
Reserved
1
OCI
0
Overcurrent indicator. Because the device does not provide signals for external hardware to report
overcurrent status to the USB host controller, this bit is always 0. This bit has no relationship to the
OTG controller register bits that relate to VBUS.
overcurrent status to the USB host controller, this bit is always 0. This bit has no relationship to the
OTG controller register bits that relate to VBUS.
0
LPS
0
Local power status. Because the root hub does not support the local power status feature, this bit
defaults to 0 and has no effect. This bit has no relationship to the OTG controller register bits that relate
to VBUS. System software can update this register to simplify host controller driver and/or OTG driver
coding.
defaults to 0 and has no effect. This bit has no relationship to the OTG controller register bits that relate
to VBUS. System software can update this register to simplify host controller driver and/or OTG driver
coding.
SPRUFM8 – September 2008
Universal Serial Bus OHCI Host Controller
29