Intel 253668-032US Benutzerhandbuch
Vol. 3 10-27
ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (APIC)
x2APIC Transitions From x2APIC Mode
From the x2APIC mode, the only valid x2APIC transition using IA32_APIC_BASE is to
the state where the x2APIC is disabled by setting EN to 0 and EXTD to 0. The x2APIC
ID (32 bits) and the legacy local xAPIC ID (8 bits) are preserved across this transi-
tion. A transition from the x2APIC mode to xAPIC mode is not valid and the corre-
sponding WRMSR to the IA32_APIC_BASE MSR will raise a GP fault.
A RESET in this state places the x2APIC in xAPIC mode. All APIC registers (including
the local APIC ID register) are initialized as described in
the state where the x2APIC is disabled by setting EN to 0 and EXTD to 0. The x2APIC
ID (32 bits) and the legacy local xAPIC ID (8 bits) are preserved across this transi-
tion. A transition from the x2APIC mode to xAPIC mode is not valid and the corre-
sponding WRMSR to the IA32_APIC_BASE MSR will raise a GP fault.
A RESET in this state places the x2APIC in xAPIC mode. All APIC registers (including
the local APIC ID register) are initialized as described in
.
An INIT in this state keeps the x2APIC in the x2APIC mode. The state of the local
APIC ID register is preserved (all 32 bits). However, all the other APIC registers are
initialized as a result of the INIT transition.
APIC ID register is preserved (all 32 bits). However, all the other APIC registers are
initialized as a result of the INIT transition.
x2APIC Transitions From Disabled Mode
From the disabled state, the only valid x2APIC transition using IA32_APIC_BASE is to
the xAPIC mode (EN= 1, EXTD = 0). Thus the only means to transition from x2APIC
mode to xAPIC mode is a two-step process:
the xAPIC mode (EN= 1, EXTD = 0). Thus the only means to transition from x2APIC
mode to xAPIC mode is a two-step process:
•
first transition from x2APIC mode to local APIC disabled mode (EN= 0, EXTD =
0),
0),
•
followed by another transition from disabled mode to xAPIC mode (EN= 1,
EXTD= 0).
EXTD= 0).
Consequently, all the APIC register states in the x2APIC, except for the x2APIC ID
(32 bits), are not preserved across mode transitions.
A RESET in the disabled state places the x2APIC in the xAPIC mode. All APIC registers
(including the local APIC ID register) are initialized as described in
(32 bits), are not preserved across mode transitions.
A RESET in the disabled state places the x2APIC in the xAPIC mode. All APIC registers
(including the local APIC ID register) are initialized as described in
.
An INIT in the disabled state keeps the x2APIC in the disabled state.
State Changes From xAPIC Mode to x2APIC Mode
After APIC register states have been initialized by software in xAPIC mode, a transi-
tion from xAPIC mode to x2APIC mode does not affect most of the APIC register
states, except the following:
tion from xAPIC mode to x2APIC mode does not affect most of the APIC register
states, except the following:
•
The Logical Destination Register is not preserved.
•
Any APIC ID value written to the memory-mapped local APIC ID register is not
preserved.
preserved.
•
The high half of the Interrupt Command Register is not preserved.
10.5.7
System Software Transitions
This section describes implications for the x2APIC across system state transitions -
specifically initialization and booting.
specifically initialization and booting.