Intel 253668-032US Benutzerhandbuch
3-4 Vol. 3
PROTECTED-MODE MEMORY MANAGEMENT
FFFF_FFF0H. RAM (DRAM) is placed at the bottom of the address space because the
initial base address for the DS data segment after reset initialization is 0.
initial base address for the DS data segment after reset initialization is 0.
3.2.2
Protected Flat Model
The protected flat model is similar to the basic flat model, except the segment limits
are set to include only the range of addresses for which physical memory actually
exists (see Figure 3-3). A general-protection exception (#GP) is then generated on
any attempt to access nonexistent memory. This model provides a minimum level of
hardware protection against some kinds of program bugs.
are set to include only the range of addresses for which physical memory actually
exists (see Figure 3-3). A general-protection exception (#GP) is then generated on
any attempt to access nonexistent memory. This model provides a minimum level of
hardware protection against some kinds of program bugs.
Figure 3-2. Flat Model
Figure 3-3. Protected Flat Model
Linear Address Space
(or Physical Memory)
Data and
FFFFFFFFH
Segment
Limit
Access
Base Address
Registers
CS
SS
DS
ES
FS
GS
Code
0
Code- and Data-Segment
Descriptors
Stack
Not Present
Linear Address Space
(or Physical Memory)
Data and
FFFFFFFFH
Segment
Limit
Access
Base Address
Registers
CS
ES
SS
DS
FS
GS
Code
0
Segment
Descriptors
Limit
Access
Base Address
Memory I/O
Stack
Not Present