FIC a440 Servicehandbuch
Software Functional Overview
FIC A440 Series Service Manual
3-3
3.3
3.3
3.3
3.3 Subsystem
Softw
Subsystem Softw
Subsystem Softw
Subsystem Software Functions
are Functions
are Functions
are Functions
This section provides introduction on the software functions of the notebook subsystems and
BIOS related function.
BIOS related function.
3.3.1 Key Chipset Summary
Following are the main chipsets used in the notebook:
Controller Chip
Vendor
Description
Processor
Intel
Socket 370 Pentium III at 650 – 850MHz
Socket 370 Celeron at 500 – 667MHz
Socket 370 Celeron at 500 – 667MHz
Core Logic
VIA
ProMedia VT8601 (North Bridge)
ProMedia VT82C686A (South Bridge)
ProMedia VT82C686A (South Bridge)
Video Controller
Trident
Trident 8400 (Integrated in North Bridge)
PCMCIA Controller
TI
TI-1225 CardBus
Supper I/O Controller
VIA
(Integrated in South Bridge)
Audio Codec
WM
WM9701A (AC97 1.03) / WM9703 (AC97 2.1)
Audio Amplifier
TI
TDA0102
Keyboard Controller
Mitsubishi
M38867
PMU Controller
MicroChip
PIC16C62B (SSOP)
ROM BIOS
Winbond
W29C040P, Boot Block Structure
Clock Generator
IC Work
W156
Temperature Sensor
VIA
(embedded in South Bridge chip)
LVDS
THC63LVDM63A
LAN
Intel
82559 (10/100Mbs Fast Ethernet)
Modem
Lucent
Mars3 (PCI Bus S/W Modem)
3.3.2 System Memory
The system memory consists of PC100 SDRAM memory on 64-bit bus and the module size
options are 16/32/64/128MB. PC100 SDRAM synchronizes itself with the CPU bus speed so
if the CPU is set at 100MHz-bus speed, the memory speed is also running at 100MHz. The
BIOS will automatically detect the amount of memory in the system and configure CMOS
accordingly during the POST (Power-On Self Test) process. This is done in a way that
requires no user interaction.
DRAM Combination Configuration:
options are 16/32/64/128MB. PC100 SDRAM synchronizes itself with the CPU bus speed so
if the CPU is set at 100MHz-bus speed, the memory speed is also running at 100MHz. The
BIOS will automatically detect the amount of memory in the system and configure CMOS
accordingly during the POST (Power-On Self Test) process. This is done in a way that
requires no user interaction.
DRAM Combination Configuration:
Slot #1
Slot #2
Total Size
32MB NIL 32MB
32MB 32MB 64MB
32MB 64MB 96MB
32MB 128MB 160MB
64MB NIL 64MB
64MB 32MB 96MB
64MB 64MB 128MB
64MB 128MB 192MB
32MB 32MB 64MB
32MB 64MB 96MB
32MB 128MB 160MB
64MB NIL 64MB
64MB 32MB 96MB
64MB 64MB 128MB
64MB 128MB 192MB
128MB NIL 128MB