Trimble Outdoors 58052-00 Benutzerhandbuch

Copernicus GPS Receiver     4 5

INTERFACE CHARACTERISTICS     3

Table 3.2

Antenna Status Truth Table

When using a passive antenna with the SHORT and OPEN pins floating, the receiver 
will report an open condition. If a normal condition from the receiver is desired when 
using a passive antenna, set the logic levels of the SHORT pin High and the OPEN 
pin Low.

This logic-level, active low input is used to issue hardware or power-on reset to the 
module. It may be connected to external logic or to a processor to issue reset. To reset 
the module, take this pin low for at least 100 microseconds. This pin must be tied to 
VCC with a resistance of less than 10 K Ohms if not used.

The hardware reset deletes all the information saved in SRAM (position time, 
almanac, ephemeris and customers' user set configurations if not previously saved in 
non-volatile Flash memory) and restarts the Copernicus receiver. See 

 for pin threshold values.

This is the primary voltage supply pin for the module. This pin also provides power 
during Standby Mode (Backup Mode). To setup separate power supplies for main 
power and Standby Mode (Backup Mode) power, an external diode-pair must be 
provided.

This logic level input is used to control the RUN/STANDBY state of the module. If 
this signal is High, the unit will run normally. If this signal is Low, the unit will go to 
“STANDBY” mode. See 

 for pin 

threshold values.

Pulse-per-second. This logic level output provides a 1 Hz timing signal to external 
devices. The positive going 4.2 usec pulse width is controllable by TSIP packet 0x8E-
4F. The cable delay and polarity is controllable by TSIP packet 0x8E-4A. The PPS 
mode is set by TSIP packet 0x35. This output meets the input/output pin threshold 
specifications (see 

Antenna Open Reported

1

1

Antenna Normal Reported

1

0

Antenna Shorted Reported

0

0

Undefined

0

1