IBM powerpc 750gx Benutzerhandbuch
User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
gx_08.fm.(1.2)
March 27, 2006
March 27, 2006
Bus Interface Operation
Page 317 of 377
An example of a two-beat data transfer (with DRTRY asserted during each data tenure) is shown in
.
Figure 8-23. 32-Bit Data-Bus Transfer (8-Beat Burst)
Figure 8-24. 32-Bit Data-Bus Transfer (2-Beat Burst with DRTRY)
TS
ABB
ADDR
TBST
AACK
ARTRY
DBB
DH[0–31]
TA
DRTRY
TEA
0
1
2
3
4
5
6
7
TS
ABB
ADDR
TBST
AACK
ARTRY
DBB
DH[0–31]
TA
DRTRY
TEA
0
1