E F Johnson Company 2422001-1 Benutzerhandbuch
CIRCUIT DESCRIPTION
6-9
August 2000
Part No. 001-2001-200
With reference to the ground on the Exciter, the
3.5V reference stability is maintained by U126B/C/D
on the MAC. The 3.5V DC passes through summing
amplifier U129B and transmit modulation gate U118D
to P100, pin 29 (Tx MOD). P100, pin 29 is connected
to backplane connector J2, pin 8 and RFIB connector
J101, pin 22 to J102, pin 13. The transmit modula-
tion and 3.5V reference enter the Exciter on J401, pin
13 and are routed to U402B, pin 6. R425 sets the
TCXO modulation level. The modulation signal and
the 3.5V DC are applied to U402A, pin 2.
on the MAC. The 3.5V DC passes through summing
amplifier U129B and transmit modulation gate U118D
to P100, pin 29 (Tx MOD). P100, pin 29 is connected
to backplane connector J2, pin 8 and RFIB connector
J101, pin 22 to J102, pin 13. The transmit modula-
tion and 3.5V reference enter the Exciter on J401, pin
13 and are routed to U402B, pin 6. R425 sets the
TCXO modulation level. The modulation signal and
the 3.5V DC are applied to U402A, pin 2.
6.2.4 SYNTHESIZER
The synthesizer inputs/outputs are shown in Fig-
ure 6-5. The synthesizer output signal is the transmit
frequency. This signal is produced by a VCO (volt-
age-controller oscillator) that is frequency controlled
by a DC voltage produced by synthesizer chip U403.
This DC voltage is filtered by a loop filter made up of
C805, C806 and R804 in the VCO circuitry.
frequency. This signal is produced by a VCO (volt-
age-controller oscillator) that is frequency controlled
by a DC voltage produced by synthesizer chip U403.
This DC voltage is filtered by a loop filter made up of
C805, C806 and R804 in the VCO circuitry.
Frequencies are selected by programming
counters in U403 to divide by a certain number. This
programming is provided through J401, pins 12, 19
and 20. The frequency stability of the synthesizer is
programming is provided through J401, pins 12, 19
and 20. The frequency stability of the synthesizer is
established by the
±
2.5 PPM stability of TCXO Y401.
This oscillator is stable from -30
°
C to +60
°
C (-22
°
F to
+140
°
F).
The VCO frequency of A007 is controlled by a
DC voltage produced by the phase detector in U403.
The phase detector senses the phase and frequency of
the two input signals and causes the VCO control volt-
age to increase or decrease if they are not the same.
When the frequencies are the same, the VCO is then
"locked" on frequency.
The phase detector senses the phase and frequency of
the two input signals and causes the VCO control volt-
age to increase or decrease if they are not the same.
When the frequencies are the same, the VCO is then
"locked" on frequency.
The synthesizer contains the R (reference), N,
and A counters, phase and lock detectors and counter
programming circuitry.
programming circuitry.
One input signal to the phase detector in U403 is
the reference frequency (f
R
). This frequency is the
17.5 MHz TCXO frequency divided by the reference
counter to the frequency step or 6.25 kHz. The other
input signal (f
counter to the frequency step or 6.25 kHz. The other
input signal (f
V
) is the VCO frequency divided by the
"N" counter in U403. The counters are programmed
through the synthesizer data line on J401, pin 20.
Each channel is programmed by a divide number so
that the phase detector input is identical to the refer-
ence frequency (f
through the synthesizer data line on J401, pin 20.
Each channel is programmed by a divide number so
that the phase detector input is identical to the refer-
ence frequency (f
R
) when the VCO is locked on the
correct frequency.
Figure 6-5 EXCITER BLOCK DIAGRAM
BUFFER
SYNTHESIZER
DATA
CLK
BUFFER
VCO
CHARGE PUMP
BUFFER
SYN CS EX
SYN LK EX
U403
Q406/Q407
U404B
BUFFER
Q410/Q411
Q413
AMP
Q405
Q403/Q404
BUFFER
Y401
TCXO
U404A
U402A
U402B
EX MOD
LPTT
SWITCH
TO PA
A007
AMP
AMP
U407B
V REF EX
PD OUT
RF IN
REF IN
Q414/Q415
V
R
Q416/Q417