Intel Z520PT CH80566EE014DT Datenbogen
Produktcode
CH80566EE014DT
Electrical Specifications
Datasheet
33
3.10
CMOS Asynchronous Signals
CMOS input signals are shown in Table 5. Legacy output FERR#, IERR#, and other
non- AGTL+ signals (THERMTRIP# and PROCHOT#) use Open Drain output buffers.
These signals do not have setup or hold time specifications in relation to BCLK[1:0].
However, all of the CMOS signals are required to be asserted for more than 5 BCLKs
3.12 for the DC specifications for the
CMOS signal groups.
3.11
Maximum Ratings
Table 6 specifies absolute maximum and minimum ratings. Within functional operation
limits, functionality and long-term reliability can be expected.
At conditions outside functional operation condition limits, but within absolute
maximum and minimum ratings, neither functionality nor long term reliability can be
expected. If a device is returned to conditions within functional operation limits after
having been subjected to conditions outside these limits, but within the absolute
maximum and minimum ratings, the device may be functional, but with its lifetime
degraded depending on exposure to conditions exceeding the functional operation
condition limits.
At conditions exceeding absolute maximum and minimum ratings, neither functionality
nor long term reliability can be expected. Moreover, if a device is subjected to these
conditions for any length of time then, when returned to conditions within the
functional operating condition limits, it will either not function or its reliability will be
severely degraded.
Although the processor contains protective circuitry to resist damage from static
electric discharge, precautions should always be taken to avoid high static voltages or
electric fields.