Acer Intel Celeron G530 KC.53001.CDG Benutzerhandbuch

 Processor on 0.13 Micron Process in the 478-Pin Package Datasheet

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Several configuration options can be configured by hardware. Celeron processor on 0.13 micron 
process sample their hardware configuration at reset, on the active-to-inactive transition of 
RESET#. For specifications on these options, refer to 

The sampled information configures the processor for subsequent operation. These configuration 
options cannot be changed except by another reset. All resets reconfigure the processor. For reset 
purposes, the processor does not distinguish between a “warm” reset and a “power-on” reset.

The use of AutoHALT, Stop-Grant, and Sleep states is allowed in Celeron processor on 
0.13 micron process based systems to reduce power consumption by stopping the clock to internal 
sections of the processor, depending on each particular state. See 

 for a visual 

representation of the processor low power states.

This is the normal operating state for the processor.

1.

Asserting this signal during RESET# will select the corresponding option.

Output tristate

SMI#

Execute BIST

INIT#

In Order Queue pipelining (set IOQ depth to 1)

A7#

Disable MCERR# observation

A9#

Disable BINIT# observation

A10#

APIC Cluster ID (0-3)

A[12:11]#

Disable bus parking

A15#

Symmetric agent arbitration ID

BR0#