Hynix HMT351U7CFR8A-PBT0 Benutzerhandbuch

Supply Voltage

Supply Voltage for Output

1. If minimum limit is exceeded, input levels shall be governed by DDR3L specifications.
2. Under 1.5V operation, this DDR3L device operates to the DDR3 specifications under the same speed timings as 

defined for this device.

3. Once initialized for DDR3 operation, DDR3L operation may only be used if the device is in reset while VDD and 

VDDQ are changed for DDR3L operation (see Figure 0).

VDD

Supply Voltage

1.283

1.35

1.45

V

1,2,3,4

VDDQ

Supply Voltage for Output

1.283

1.35

1.45

V

1,2,3,4

1. Maximum DC value may not be greater than 1.425V. The DC value is the linear average of VDD/VDDQ (t) over a 

very long period of time (e.g., 1 sec).

2. If maximum limit is exceeded, input levels shall be governed by DDR3 specifications.
3. Under these supply voltages, the device operates to this DDR3L specification.
4. Once initialized for DDR3L operation, DDR3 operation may only be used if the device is in reset while VDD and 

VDDQ are changed for DDR3 operation  (see Figure 0).

VDD

1.425

1.5

1.575

V

1,2,3

VDDQ

1.425

1.5

1.575

V

1,2,3