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Intel
MFS5000SI
Benutzerhandbuch
Intel MFS5000SI MFS5000SIB Benutzerhandbuch
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MFS5000SIB
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Intel® Compute Module MFS5000SI TPS
Table of Contents
Table of Contents
1.
Introduction
............................................................................................................................. 1
1.1
Chapter Outline........................................................................................................ 1
1.2
Intel
®
Compute Module Use Disclaimer................................................................... 1
2.
Product Overview
.................................................................................................................... 2
2.1
Intel
®
Compute Module MFS5000SI Feature Set .................................................... 2
2.2
Compute Module Layout.......................................................................................... 3
2.2.1
Connector and Component Locations ..................................................................... 3
2.2.2
External I/O Connector Locations............................................................................ 4
2.2.3
Compute Module Mechanical Drawings .................................................................. 5
3.
Functional Architecture
........................................................................................................... 6
3.1
Intel
®
5000P Memory Controller Hub (MCH) ........................................................... 7
3.1.1
System Bus Interface............................................................................................... 7
3.1.2
Processor Support ................................................................................................... 7
3.1.3
Memory Subsystem ................................................................................................. 8
3.2
Intel
®
6321ESB I/O Controller Hub ........................................................................ 16
3.2.1
PCI Subsystem ...................................................................................................... 16
3.2.2
Serial ATA Support ................................................................................................ 17
3.2.3
Parallel ATA (PATA) Support ................................................................................ 17
3.2.4
USB 2.0 Support.................................................................................................... 18
3.3
Video Support ........................................................................................................ 18
3.4
Network Interface Controller (NIC) ........................................................................ 19
3.4.1
Intel
®
I/O Acceleration Technology ........................................................................ 19
3.4.2
MAC Address Definition......................................................................................... 19
3.5
Super I/O ............................................................................................................... 19
4.
Connector / Header Locations and Pin-outs
............................................................................ 21
4.1
Board Connector Information................................................................................. 21
4.2
Power Connectors ................................................................................................. 21
4.3
I/O Connector Pin-out Definition ............................................................................ 22
4.3.1
VGA Connector...................................................................................................... 22
4.3.2
I/O Mezzanine Card Connector ............................................................................. 22
4.3.3
Midplane Signal Connector.................................................................................... 23
Revision 1.4
iii
Intel order number: E15154-007
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