Texas Instruments TPS51100EVM-001 Evaluation Module TPS51100EVM-001 TPS51100EVM-001 Datenbogen
Produktcode
TPS51100EVM-001
www.ti.com
2
Electrical Performance Specifications
3
Schematic
1
2
3
4
10
9
8
7
U1
TPS51100DGQ
VIN
S5
GND
S3
VDDQSNS
VINLDO
VTT
PGND
VTTREF
VTTSNS
5
6
C8
C7
C9
J4
J6
1
1
1
R1
J1
EX_REF
SW1
SW2
J7
J8
J5
1
Component not used on PCB
V5IN
V5IN_GND
Vtt_ref
Vtt_ref_GND
J3
1
JP1
1
J2
C2
10 µF
C3
10 µF
R2
0 Ω
C1 10 µF
C4
4.7 µF
C10
0.1 µF
C6
10 µF
C5
10 µF
UDG−04093
VDDQ IN
VTT OUT
GND OUT
3.1
JP1 Jumper
Electrical Performance Specifications
Table 1. Electrical Performance Specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
V
V5IN
Supply voltage
4.75
5.25
V
VDDQ
LDO supply voltage
1.5
3.4
V
V
VTT
Termination voltage
V
VDDQSNS
= V
VDDQ
V
VDDQ
/2
V
VTT(tol)
Termination voltage tolerance
-40
40
mV
V
VTT(RIPPLp-p)
Termination voltage ripple
(1)
0
20
I
VTT
Termination current
V
VIN LDO
= V
VDDQ
-2
2
A
V
Vtt_ref(tol)
Reference voltage tolerance
I
Vtt_ref
< 10 mA
-10
10
mV
I
Vtt_ref
Reference current
10
mA
(1) VTT output tracks theripple voltage on VDDQSNS input per DDR specification.
The TPS51100EVM schematic is shown in
Figure 1
.
Figure 1. TPS51100EVM Schematic
A Standard 100 mil spacing header (JP1) provides the user the ability to select either the VDDQ voltage
or an external reference voltage for the TPS51100’s VDDQSNS voltage. The TPS51100 produces a
termination voltage and buffered reference voltage equal to ½ this VDDQSNS voltage. This allows the
user to evaluate the TPS51100 under a variety of conditions. The TPS51100EVM should not be operated
when this jumper is not in place and the EVM should be powered down prior to changing the jumper
position.
Using the TPS51100
SLUU201–JULY 2004
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