Texas Instruments THS5671A Evaluation Module THS5671EVM THS5671EVM Datenbogen

Produktcode
THS5671EVM
Seite von 40
3
2
1
D[2–15]
D[0–13]
DAC
W3
1
2
3
CLKOUT
DAC Clock
J1 Pin 33
J5
W2
CLK
EXTLO
EXTIO
BIASJ
R
adj
MODE
W4
W5
DV
DD
5 VA
D[0–15]
J1
IOUT 1
50 Ω
IOUT 2
50 Ω
Generating a Voltage Reference
Figure 3-3. Direct Connect Jumper Configuration for THS56X1A
Table 3-4. Shipping Condition of Jumpers W1 Through W9
Jumper
Pins 1 and 2
Pins 2 and 3
W1
Jumper installed
Jumper not installed
W2
Jumper not installed
Jumper installed
W3
Jumper installed
Jumper not installed
W4
Jumper not installed
N/A
W5
Jumper installed
N/A
W6
W7 jumper positioin F to IOUT2
N/A
W7
W7 jumper position C to IOUT1
N/A
W8
Jumper not installed
Jumper installed
W9
Jumper not installed
N/A
3.5
Generating a Voltage Reference
Two options provide the voltage reference:
Internal reference
Onboard external reference
3.5.1 Internal Reference
To configure the THS56X1 EVM to use the internal 1.2 V on-chip Vref, set the jumper configuration as
shown in
. A drawing depicting the jumper placement is shown in
.
Table 3-5. Jumper Configuration for Internal Reference
Jumper
Pins 1 and 2
Pins 2 and 3
VREF setting
W3
Jumper installed
Jumper not installed
W4
Jumper not installed
N/A
28
User Configurations
SLAU032C
February 2001
Revised April 2011
Copyright
©
2001
2011, Texas Instruments Incorporated