Texas Instruments CDCLVP1204EVM - CDCLVP1204 Evaluation Module CDCLVP1204EVM CDCLVP1204EVM Datenbogen
Produktcode
CDCLVP1204EVM
VCC
VCC
VCC
OUTP0
OUTN0
OUTN1
OUTP1
OUTN2
OUTP2
OUTN3
OUTP3
INP0
INN0
INP1
INN1
INP0
INN0
INP1
INN1
C73
0.1uF
C73
0.1uF
GND
1
IN_SEL
2
INP1
3
INN1
4
VCC
5
INP0
6
INN0
7
V
AC_REF
8
OUTP0
9
OUTN0
10
OUTP1
1
1
OUTN1
12
OUTP2
13
OUTN2
14
OUTP3
15
OUTN3
16
TH_P
AD
17
U1
CDCL
VP1204
U1
CDCL
VP1204
1
2
R154
50
R154
50
C136
4.7uF
C136
4.7uF
1
2
R153
50
R153
50
2
3
1
4
5
J105
SMA-EDGE
J105
SMA-EDGE
C68
0.1uF
C68
0.1uF
1
2
R152
50
R152
50
P4
VDD3.3V
P4
VDD3.3V
D26
LEDGREEN
D26
LEDGREEN
D12
MBRS2040L
T3
D12
MBRS2040L
T3
2
3
1
4
5
J103
SMA-EDGE
J103
SMA-EDGE
1
2
R120
301
R120
301
C42
4.7uF
C42
4.7uF
C135
4.7uF
C135
4.7uF
C72
0.1uF
C72
0.1uF
1
2
R130
10k
R130
10k
C38
4.7uF
C38
4.7uF
P5
GND
P5
GND
C69
0.1uF
C69
0.1uF
2
3
1
4
5
J106
SMA-EDGE
J106
SMA-EDGE
1
2
JP1JP1
1
2
L6
BLM15HD102SN1D
L6
BLM15HD102SN1D
2
3
1
4
5
J104
SMA-EDGE
J104
SMA-EDGE
C159
0.1uF
C159
0.1uF
1
2
R155
50
R155
50
Schematics and Layout
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Figure 2. CDCLVP1204EVM—Schematic
4
Low Additive Phase Noise Clock Buffer Evaluation Board
SCAU032 – July 2009