Texas Instruments Evaluation Kit for FPD-Link Family of Serializer and Deserializer LVDS Devices FLINK3V8BT-85/NOPB FLINK3V8BT-85/NOPB Datenbogen

FPD-Link Evaluation Kit User’s Manual 

 

National Semiconductor Corporation 

 

Rev 3.0 
Date: 9/25/2007 
Page 6 of 25 

 

 
The PCB routing for the Tx input pins (TxIN) have been laid out to accept incoming 
data from a 60-pin IDC connector. The TxOUT/RxIN interface uses a 20-pin IDC 
connector through a IDC ribbon cable.  Please follow these steps to set up the 
evaluation kit for bench testing and performance measurements: 
 
1)  Connect one end of the 20-pin IDC cable to the transmitter board and the other 

end to the receiver board.  Longer lengths can be used. 

 
Note: Previous HSL Tx/Rx 8 Bit boards have different IDC pinouts and must be 
scrambled in the IDC cable in order to be compatible with this demo kit. 
 
2) Jumpers have been configured at the factory, they should not require any 

changes for operation of the chipset.   See text on Jumper settings for more 
details. 

3)  From the Graphics card, connect a flat (ribbon) cable to the transmitter board and 

connect the another flat cable from the receiver board to the panel (Note:  Refer 
to AN-1127 for suggested mapping schemes).  Note that pin 1 on the connector 
should be connected to pin 1 of the cable. A scramble cable may be required. 

4)  Power for the Tx and Rx boards must be supplied externally through TP1 (Vcc).  

Grounds for both boards are connected through TP2 (GND) (see section below). 

 
 

 

The Transmitter and Receiver boards must be powered by supplying power 
externally through TP1 (Vcc) and TP2 (GND) on EACH board. The maximum 
voltage that should ever be applied to the FPD-Link Transmitter (385A) or Receiver 
(386) Vcc terminal is +4V MAXIMUM.