Texas Instruments TPS59640EVM-751 Evaluation Module TPS59640EVM-751 TPS59640EVM-751 Datenbogen
Produktcode
TPS59640EVM-751
Configuration
5.6
Output Connections
1. Connect the load to J1, J5, and J6, and set the load to constant resistance mode to sink 0 Adc before
5Vin and 12VBAT are applied. This is for CPU operation.
2. Connect a voltmeter V3 at J14 to measure CPU Vcore sense voltage.
6
Configuration
All jumper selections must be made prior to applying power to the EVM. The user can configure this EVM
per the following configurations.
per the following configurations.
6.1
CPU and GPU Configuration
6.1.1
CPU/GPU Current Limit Trip Selection (J17 for CPU and J20 for GPU)
The current limit trip can be set by J17 (COCP) and J20 (GOCP).
Default setting: Level 5 for both CPU and GPU.
Table 2. Current Limit Trip Selection
Jumper Set to
Connected Resistor
COCP Limit (Typ)
Left (1-2 pin shorted)
150k
Max
Second (3-4 pin shorted)
100k
Level 7
Third (5-6 pin shorted)
75k
Level 6
Fourth (7-8 pin shorted)
56.2k
Level 5
Fifth (9-10 pin shorted)
39.2k
Level 4
Sixth (11-12 pin shorted)
30.1k
Level 3
Seventh (13-14 pin shorted)
24.3k
Level 2
Right (15-16 pin shorted)
20.0k
Min
24
Using the TPS59640EVM-751 IMVP-7, 3-Phase CPU/1-Phase GPU SVID
SLUU796
–
January 2012
Power System
Copyright
©
2012, Texas Instruments Incorporated