Benutzerhandbuch für Texas Instruments TPS59640EVM-751 Evaluation Module TPS59640EVM-751

Inhaltsverzeichnis

• Using the TPS59640EVM-751 IMVP-7 3-Phase CPU/1-Phase GPU SVID Power System

  1
  • 1 Description

    4
    • 1.1 Typical Applications

      4
    • 1.2 Features

      4
  • 2 TPS59640EVM-751 Power System Block Diagram

    5
  • 3 Electrical Performance Specifications

    6
  • 4 Schematic

    8
  • 5 Test Setup

    21
    • 5.1 Test Equipment

      21
      • 5.1.1 Personal Computer (Host Computer)

        21
      • 5.1.2 USB Cable

        21
      • 5.1.3 TPS59640 USB Driver and SVID GUI Installation

        21
      • 5.1.4 DC Source

        21
      • 5.1.5 Meters

        21
      • 5.1.6 Load

        21
      • 5.1.7 Oscilloscope

        22
    • 5.2 Recommended Wire Gage

      22
    • 5.3 Recommended Test Setup

      22
    • 5.4 USB Cable Connections

      23
    • 5.5 Input Connections

      23
    • 5.6 Output Connections

      24
  • 6 Configuration

    24
    • 6.1 CPU and GPU Configuration

      24
      • 6.1.1 CPU/GPU Current Limit Trip Selection (J17 for CPU and J20 for GPU)

        24
      • 6.1.2 CPU Frequency Selection (J18)

        25
      • 6.1.3 GPU Frequency Selection (J21)

        25
      • 6.1.4 CPU Overshoot/Undershoot Reduction Selection (J19)

        25
      • 6.1.5 GPU Overshoot/Undershoot Reduction Selection (J22)

        26
      • 6.1.6 F2806 DSP Program Mode Selection (J46)

        26
      • 6.1.7 5Vin Bias Voltage Option (J41)

        26
      • 6.1.8 Onboard Dynamic Load Selection [S3 for CPU, S2 [Upper) for GPU, S2 (Lower) for VCCIO]

        26
      • 6.1.9 IMVP-7 VR_ON Enable Selection (S4)

        27
    • 6.2 1.2VDDQ, 0.6V VTT and 0.6V VTTREF Configuration

      27
      • 6.2.1 VDDQ S3, S5 Enable Selection

        27
    • 6.3 1.05V VCCIO Configuration

      27
      • 6.3.1 1.05V Enable Selection (S1)

        27
      • 6.3.2 VCCIO Output Voltage Selection (J23)

        27
  • 7 Test Procedure

    28
    • 7.1 Line/Load Regulation and Efficiency Measurement Procedure

      28
      • 7.1.1 CPU

        28
      • 7.1.2 GPU

        29
      • 7.1.3 VDDQ

        30
      • 7.1.4 VCCIO

        30
    • 7.2 Equipment Shutdown

      31
  • 8 Performance Data and Typical Characteristic Curves

    32
    • 8.1 CPU3-Phase Operation

      32
    • 8.2 CPU 2-Phase Operation

      36
    • 8.3 CPU 1-Phase Operation

      40
    • 8.4 GPU Operation

      44
    • 8.5 1.05V VCCIO

      48
    • 8.6 1.2 VDDQ

      51
  • 9 EVM Assembly Drawings and PCB layout

    53
  • 10 Bill of Materials

    59
• Important Notices

  62
• Important Notices

  63