Texas Instruments Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK04806BEVAL/NOPB LMK04806BEVAL/NOPB Datenbogen
Produktcode
LMK04806BEVAL/NOPB
L M K 0 4 8 X X E V A L U A T I O N B O A R D O P E R A T I N G I N S T R U C T I O N S
33
Table 10: Register Controls and Descriptions on Bits/Pins tab
Group
Register Name
Description
Mode Control
RESET
Resets the device to default register values. RESET
must be cleared for normal operation to prevent an
unintended reset every time R0 is programmed.
must be cleared for normal operation to prevent an
unintended reset every time R0 is programmed.
POWERDOWN
Places the device in powerdown mode.
MODE
Selects the operating mode (topology) for the
LMK048xx device.
LMK048xx device.
PD_OSCin
Powers down the OSCin buffer. For use in Clock
Distribution mode if OSCin path is not used.
Distribution mode if OSCin path is not used.
FEEDBACK_MUX
Selects the feedback source for 0-delay mode.
OSCin_FREQ
Must be set to the OSCin frequency range for
PLL2. Used for proper operation of the internal
VCO calibration routine.
Entering a reference oscillator frequency on PLL2
tab will automatically update OSCin_FREQ to the
proper frequency range.
PLL2. Used for proper operation of the internal
VCO calibration routine.
Entering a reference oscillator frequency on PLL2
tab will automatically update OSCin_FREQ to the
proper frequency range.
VCO_MUX
Selects between VCO and VCO divider to drive the
clock distribution path. The VCO divider is only
valid if MODE is selecting the Internal VCO.
clock distribution path. The VCO divider is only
valid if MODE is selecting the Internal VCO.
uWire_LOCK
When checked, no other uWire programming will
have effect. Must be unchecked to enable uWire
programming of registers R0 to R30.
have effect. Must be unchecked to enable uWire
programming of registers R0 to R30.
C
LKin
CLKin_Select_MODE
Selects operational mode for how the device selects
the reference clock for PLL1.
the reference clock for PLL1.
EN_CLKin1
Enables CLKin1 as a usable reference input during
auto switching mode.
auto switching mode.
EN_CLKin0
Enables CLKin0 as a usable reference input during
auto switching mode.
auto switching mode.
CLKinX_BUF_TYPE
Selects the CLKinX input buffer to Bipolar
(internal 0 mV offset) or MOS (internal 55 mV
offset).
(internal 0 mV offset) or MOS (internal 55 mV
offset).
EN_LOS
Enable the Loss-Of-Signal (LOS) detect circuitry.
LOS_TIMEOUT
Sets the timeout value for the LOS detect circuitry
to assert a loss of signal state on a clock input.
to assert a loss of signal state on a clock input.
Crystal
EN_PLL2_XTAL
Enables Crystal Oscillator
XTAL_LVL
Sets peak amplitude on the tunable crystal. Values
listed are for a 20.48 MHz crystal.
listed are for a 20.48 MHz crystal.
IO
C
ontrol
LD_MUX
Sets the selected signal on the Status_LD pin.
LD_TYPE
Sets I/O pin type on the Status_LD pin.
HOLDOVER_MUX
Sets the selected signal on the Status_HOLDOVER
pin.
pin.