Texas Instruments TMS320C6472 Evaluation Module TMDSEVM6472LE TMDSEVM6472LE Datenbogen
Produktcode
TMDSEVM6472LE
PRODUCTPREVIEW
RGRXC
RGRD[3:0]
RGRXCTL
12
13
11
10
9
8
SPRS612G
–
JUNE 2009
–
REVISED JULY 2011
Table 7-121. Timing Requirements for EMAC RGMII Input Operation 10/100/1000 Mbit/s
(see
500/625/700
NO.
PARAMETER
SPEED
UNIT
MIN
MAX
8
t
c(RGRXC)
Cycle time, RGRXC
10 Mbps
360
440
100 Mbps
36
44
ns
1000 Mbps
7.2
8.8
9
t
w(RGRXCH)
Pulse duration, RGRXC high
10/100 Mbps
0.40*t
c(RGRXC)
0.60*t
c(RGRXC)
ns
1000 Mbps
0.45*t
c(RGRXC)
0.55*t
c(RGRXC)
10
t
w(RGRXCL)
Pulse duration, RGRXC low
10/100 Mbps
0.40*t
c(RGRXC)
0.60*t
c(RGRXC)
ns
1000 Mbps
0.55*tc(RGRX
0.45*t
c(RGRXC)
C)
11
t
t(RGRXC)
Transition time, RGRXC
10/100/1000 Mbps
0.75
ns
12
t
su(RGRDV-RGRXC)
Setup time, transmit selected signals
10/100/1000 Mbps
(RGRD[3:0] and RGRXCTL) valid before
1.2
ns
RGRXC high/low
13
t
h(RGRXC-RGRDV)
Hold time, transmit selected signals
10/100/1000 Mbps
(RGRD[3:0] and RGRXCTL) valid after
1.2
ns
RGRXC high/low
Figure 7-55. RGMII Input Timing
Copyright
©
2009
–
2011, Texas Instruments Incorporated
C64x+ Peripheral Information and Electrical Specifications
233
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