Texas Instruments MSP430F677xIPEU & MSP430F677x1IPEU 128-Pin target board MSP-TS430PEU128 MSP-TS430PEU128 Datenbogen
Produktcode
MSP-TS430PEU128
ECCN 5E002 TSPA - Technology / Software Publicly Available
MSP430F677x
,
MSP430F676x
,
MSP430F674x
SLAS768D – SEPTEMBER 2012 – REVISED DECEMBER 2013
SD24_B Performance (continued)
f
SD24
= 1 MHz, SD24OSRx = 256, SD24REFON = 1
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SD24GAIN: 1, f
CM
= 50 Hz, V
CM
= 930 mV
3 V
-120
Common mode rejection at
CMRR,50Hz
SD24GAIN: 8, f
CM
= 50 Hz, V
CM
= 120 mV
3 V
-110
dB
50 Hz
(8)
SD24GAIN: 32, f
CM
= 50 Hz, V
CM
= 30 mV
3 V
-100
SD24GAIN: 1, V
CC
= 3 V + 50 mV × sin(2
π × f
VCC
×
-61
t), f
VCC
= 50 Hz
AC
AC power supply rejection
SD24GAIN: 8, V
CC
= 3 V + 50 mV × sin(2
π × f
VCC
×
-75
dB
PSRR,ext
ratio, external reference
(9)
t), f
VCC
= 50 Hz
SD24GAIN: 32, V
CC
= 3 V + 50 mV × sin(2
π × f
VCC
×
-79
t), f
VCC
= 50 Hz
SD24GAIN: 1, V
CC
= 3 V + 50 mV × sin(2
π × f
VCC
×
-61
t), f
VCC
= 50 Hz
AC
AC power supply rejection
SD24GAIN: 8, V
CC
= 3 V + 50 mV × sin(2
π × f
VCC
×
-75
dB
PSRR,int
ratio, internal reference
(9)
t), f
VCC
= 50 Hz
SD24GAIN: 32, V
CC
= 3 V + 50 mV × sin(2
π × f
VCC
×
-79
t), f
VCC
= 50 Hz
Crosstalk source: SD24GAIN: 1, Sine-wave with
maximum possible Vpp, f
maximum possible Vpp, f
IN
= 50 Hz, 100 Hz,
3 V
-120
Converter under test: SD24GAIN: 1
Crosstalk source: SD24GAIN: 1, Sine-wave with
Crosstalk between
XT
maximum possible Vpp, f
IN
= 50 Hz, 100 Hz,
3 V
-115
dB
converters
(10)
Converter under test: SD24GAIN: 8
Crosstalk source: SD24GAIN: 1, Sine-wave with
maximum possible Vpp, f
maximum possible Vpp, f
IN
= 50 Hz, 100 Hz,
3 V
-110
Converter under test: SD24GAIN: 32
(8)
The AC CMRR is the difference between a hypothetical signal with the amplitude and frequency of the applied common mode ripple
applied to the inputs of the ADC and the actual common mode signal spur visible in the FFT spectrum:
AC CMRR = Error Spur [dBFS] - 20log(V
applied to the inputs of the ADC and the actual common mode signal spur visible in the FFT spectrum:
AC CMRR = Error Spur [dBFS] - 20log(V
CM
/1.2V/G) [dBFS] with a common mode signal of V
CM
× sin(2
π × f
CM
× t) applied to the analog
inputs.
The AC CMRR is measured with the both inputs connected to the common mode signal; that is, no differential input signal is applied.
With the specified typical values the error spur is within the noise floor (as specified by the SINAD values).
The AC CMRR is measured with the both inputs connected to the common mode signal; that is, no differential input signal is applied.
With the specified typical values the error spur is within the noise floor (as specified by the SINAD values).
(9)
The AC PSRR is the difference between a hypothetical signal with the amplitude and frequency of the applied supply voltage ripple
applied to the inputs of the ADC and the actual supply ripple spur visible in the FFT spectrum:
AC PSRR = Error Spur [dBFS] - 20log(50mV/1.2V/G) [dBFS] with a signal of 50mV × sin(2
applied to the inputs of the ADC and the actual supply ripple spur visible in the FFT spectrum:
AC PSRR = Error Spur [dBFS] - 20log(50mV/1.2V/G) [dBFS] with a signal of 50mV × sin(2
π × f
VCC
× t) added to V
CC
.
The AC PSRR is measured with the inputs grounded; that is, no analog input signal is applied.
With the specified typical values the error spur is within the noise floor (as specified by the SINAD values).
SD24GAIN: 1
With the specified typical values the error spur is within the noise floor (as specified by the SINAD values).
SD24GAIN: 1
→ Hypothetical signal: 20log(50mV/1.2V/1) = -27.6 dBFS
SD24GAIN: 8
→ Hypothetical signal: 20log(50mV/1.2V/8) = -9.5 dBFS
SD24GAIN: 32
→ Hypothetical signal: 20log(50mV/1.2V/32) = 2.5 dBFS
(10) The crosstalk XT is specified as the tone level of the signal applied to the crosstalk source seen in the spectrum of the converter under
test. It is measured with the inputs of the converter under test being grounded.
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