Benutzerhandbuch für Texas Instruments MSP430F677xIPEU & MSP430F677x1IPEU 128-Pin target board MSP-TS430PEU128

Inhaltsverzeichnis

• Features

  1
• Applications

  1
• Description

  2
• Development Tools Support

  23
  • Hardware Features

    23
  • Recommended Hardware Options

    23
    • Target Socket Boards

      23
    • Experimenter Boards

      23
    • Debugging and Programming Tools

      23
    • Production Programmers

      23
  • Recommended Software Options

    23
    • Integrated Development Environments

      23
    • MSP430Ware

      23
    • SYS/BIOS

      24
    • Command-Line Programmer

      24
• Device and Development Tool Nomenclature

  24
• Short-Form Description

  26
  • CPU (Link to User's Guide)

    26
  • Instruction Set

    26
  • Operating Modes

    27
  • Interrupt Vector Addresses

    28
  • Special Function Registers (SFRs)

    29
  • Memory Organization

    30
  • Bootstrap Loader (BSL)

    32
  • JTAG Operation

    32
    • JTAG Standard Interface

      32
    • Spy-Bi-Wire Interface

      32
  • Flash Memory (Link to User's Guide)

    33
  • RAM Memory (Link to User's Guide)

    33
  • Backup RAM Memory (Link to User's Guide)

    33
  • Peripherals

    33
    • Oscillator and System Clock (Link to User's Guide)

      33
    • Power Management Module (PMM) (Link to User's Guide)

      33
    • Auxiliary Supply System (Link to User's Guide)

      34
    • Backup Subsystem (Link to User's Guide)

      34
    • Digital I/O (Link to User's Guide)

      34
    • Port Mapping Controller (Link to User's Guide)

      34
    • System Module (SYS) (Link to User's Guide)

      36
    • Watchdog Timer (WDT_A) (Link to User's Guide)

      37
    • DMA Controller (Link to User's Guide)

      37
    • CRC16 (Link to User's Guide)

      38
    • Hardware Multiplier (Link to User's Guide)

      38
    • AES128 Accelerator (Link to User's Guide)

      38
    • Enhanced Universal Serial Communication Interface (eUSCI) (Links to User's Guide: UART Mode, SPI Mode, I2C Mode)

      38
    • ADC10_A (Link to User's Guide)

      38
    • SD24_B (Link to User's Guide)

      38
    • TA0 (Link to User's Guide)

      39
    • TA1 (Link to User's Guide)

      39
    • TA2 (Link to User's Guide)

      40
    • TA3 (Link to User's Guide)

      40
    • SD24_B Triggers

      41
    • ADC10_A Triggers

      41
    • Real-Time Clock (RTC_C) (Link to User's Guide)

      41
    • REF Voltage Reference (Link to User's Guide)

      41
    • LCD_C (Link to User's Guide)

      41
    • Comparator_B (Link to User's Guide)

      41
    • Embedded Emulation Module (EEM) (Link to User's Guide)

      42
    • Peripheral File Map

      43
• Absolute Maximum Ratings

  59
• Recommended Operating Conditions

  59
• Electrical Characteristics

  60
• Active Mode Supply Current Into VCC Excluding External Current

  60
• Low-Power Mode Supply Currents (Into VCC) Excluding External Current

  61
• Low-Power Mode With LCD Supply Currents (Into VCC) Excluding External Current

  62
• Schmitt-Trigger Inputs – General Purpose I/O

  63
• Inputs – Ports P1 and P2

  63
• Leakage Current – General Purpose I/O

  63
• Outputs – General Purpose I/O (Full Drive Strength)

  64
• Outputs – General Purpose I/O (Reduced Drive Strength)

  64
• Output Frequency – General Purpose I/O

  64
• Typical Characteristics – Outputs, Reduced Drive Strength (PxDS.y = 0)

  65
• Typical Characteristics – Outputs, Full Drive Strength (PxDS.y = 1)

  66
• Crystal Oscillator, XT1, Low-Frequency Mode

  67
• Internal Very-Low-Power Low-Frequency Oscillator (VLO)

  68
• Internal Reference, Low-Frequency Oscillator (REFO)

  68
• DCO Frequency

  68
• PMM, Brown-Out Reset (BOR)

  69
• PMM, Core Voltage

  69
• PMM, SVS High Side

  70
• PMM, SVM High Side

  71
• PMM, SVS Low Side

  72
• PMM, SVM Low Side

  72
• Wake-Up From Low-Power Modes and Reset

  72
• Auxiliary Supplies Recommended Operating Conditions

  73
• Auxiliary Supplies - AUX3 (Backup Subsystem) Currents

  73
• Auxiliary Supplies - Auxiliary Supply Monitor

  73
• Auxiliary Supplies - Switch On-Resistance

  74
• Auxiliary Supplies - Switching Time

  74
• Auxiliary Supplies - Switch Leakage

  74
• Auxiliary Supplies - Auxiliary Supplies to ADC10_A

  74
• Auxiliary Supplies - Charge Limiting Resistor

  74
• Timer_A

  75
• eUSCI (UART Mode) Recommended Operating Conditions

  75
• eUSCI (UART Mode)

  75
• eUSCI (SPI Master Mode) Recommended Operating Conditions

  75
• eUSCI (SPI Master Mode)

  75
• eUSCI (SPI Slave Mode)

  77
• eUSCI (I2C Mode)

  79
• Schmitt-Trigger Inputs – RTC Tamper Detect Pin

  79
• Inputs – RTC Tamper Detect Pin

  80
• Leakage Current – RTC Tamper Detect Pin

  80
• Outputs – RTC Tamper Detect Pin

  80
• LCD_C Recommended Operating Conditions

  81
• LCD_C Electrical Characteristics

  82
• SD24_B Power Supply and Recommended Operating Conditions

  83
• SD24_B Analog Input

  83
• SD24_B Supply Currents

  84
• SD24_B Performance

  84
• SD24_B, AC Performance

  87
• SD24_B, AC Performance

  87
• SD24_B, AC Performance

  87
• SD24_B External Reference Input

  88
• 10-Bit ADC Power Supply and Input Range Conditions

  89
• 10-Bit ADC Timing Parameters

  89
• 10-Bit ADC Linearity Parameters

  90
• 10-Bit ADC External Reference

  90
• REF Built-In Reference

  91
• Comparator_B

  92
• Flash Memory

  92
• JTAG and Spy-Bi-Wire Interface

  93
• Input/Output Schematics

  94
  • Port P1, P1.0 Through P1.3 Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    94
  • Port P1, P1.0 Through P1.3 Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    96
  • Port P1, P1.4 and P1.5 Input/Output With Schmitt Trigger (MSP430F677xIPEU and MSP430F677xIPZ)

    98
  • Port P1, P1.6 and P1.7 Input/Output With Schmitt Trigger (MSP430F677xIPEU and MSP430F677xIPZ)

    100
  • Port P2, P2.0 Through P2.7, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    101
  • Port P2, P2.0 Through P2.3, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    103
  • Port P2, P2.4 Through P2.6, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    105
  • Port P2, P2.7, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    106
  • Port P3, P3.0 Through P3.7, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    107
  • Port P3, P3.0, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    109
  • Port P3, P3.1 Through P3.7, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    110
  • Port P4, P4.0 Through P4.7, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    112
  • Port P4, P4.0 Through P4.7, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    114
  • Port P5, P5.0 Through P5.3, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    116
  • Port P5, P5.4 Through P5.6, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    118
  • Port P5, P5.7, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    120
  • Port P5, P5.0 Through P5.7, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    121
  • Port P6, P6.0, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    123
  • Port P6, P6.1 Through P6.3, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    124
  • Port P6, P6.4 Through P6.7, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    126
  • Port P6, P6.0 Through P6.7, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    128
  • Port P7, P7.0 Through P7.7, Input/Output With Schmitt Trigger (MSP430F67xxIPEU Only)

    130
  • Port P7, P7.0 Through P7.7, Input/Output With Schmitt Trigger (MSP430F67xxIPZ Only)

    132
  • Port P8, P8.0 Through P8.7, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    134
  • Port P8, P8.0, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    136
  • Port P8, P8.1, Input/Output With Schmitt Trigger (MSP430F677xIPZ Only)

    137
  • Port P9, P9.0 Through P9.7, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    138
  • Port P10, P10.0 Through P10.7, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    140
  • Port P11, P11.0, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    142
  • Port P11, P11.1, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    143
  • Port P11, P11.2 and P11.3, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    144
  • Port P11, P11.4 and P11.5, Input/Output With Schmitt Trigger (MSP430F677xIPEU Only)

    145
  • Port J, J.0, JTAG pin TDO, Input/Output With Schmitt Trigger or Output

    146
  • Port J, J.1 to J.3, JTAG Pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output

    146
  • Device Descriptors (TLV)

    148
• Revision History

  151