Texas Instruments AM18x eXperimenter's Kit TMDSEXP1808L TMDSEXP1808L Datenbogen
Produktcode
TMDSEXP1808L
PLLDIV1 (/1)
SYSCLK1
PLLDIV2 (/2)
SYSCLK2
PLLDIV4 (/4)
SYSCLK4
PLLDIV5 (/3)
SYSCLK5
PLLDIV6 (/1)
SYSCLK6
PLLDIV7 (/6)
SYSCLK7
DIV4.5
1
0
EMIFA
Internal
Clock
Source
CFGCHIP3[EMA_CLKSRC]
1
0
PREDIV
PLLM
1
0
Square
Wave
Crystal
PLL1_SYSCLK3
PLLCTL[EXTCLKSRC]
AUXCLK
PLL
PLLDIV3 (/3)
SYSCLK3
DDR2/mDDR
Internal
Clock
Source
PLLDIV2 (/2)
PLLDIV3 (/3)
PLLDIV1 (/1)
0
1
PLLCTL[PLLEN]
POSTDIV
PLLM
PLL
0
1
PLLCTL[PLLEN]
PLLCTL[CLKMODE]
POSTDIV
PLLC0 OBSCLK
(CLKOUT Pin)
(CLKOUT Pin)
DIV4.5
OSCDIV
PLL Controller 0
PLL Controller 1
SYSCLK2
SYSCLK3
SYSCLK1
OSCIN
14h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
SYSCLK1
SYSCLK2
SYSCLK3
SYSCLK4
SYSCLK5
SYSCLK6
SYSCLK7
SYSCLK3
SYSCLK4
SYSCLK5
SYSCLK6
SYSCLK7
PLLC1 OBSCLK
OCSEL[OCSRC]
14h
17h
18h
19h
17h
18h
19h
SYSCLK1
SYSCLK2
SYSCLK3
SYSCLK2
SYSCLK3
OCSEL[OCSRC]
OSCDIV
PLLC1 OBSCLK
DEEPSLEEP
Enable
SPRS653E – FEBRUARY 2010 – REVISED MARCH 2014
Figure 6-9. PLL Topology
78
Peripheral Information and Electrical Specifications
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