Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Datenbogen
Produktcode
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
Initialization Sequence
Description
Value
The SDRAM interface is not in the wakeup period.
0
The SDRAM interface is running through the wakeup period
(greater than 100 μs).
(greater than 100 μs).
If an attempt is made to read or write the SDRAM during this
period, the access is held off until the wakeup period is
complete.
period, the access is held off until the wakeup period is
complete.
1
0
RO
INITSEQ
6
Write Busy
Description
Value
The external interface is not performing a write.
0
The external interface is performing a write.
1
0
RO
WBUSY
5
Non-Blocking Read Busy
Description
Value
The external interface is not performing a non-blocking read.
0
The external interface is performing a non-blocking read, or if
the non-blocking read is paused due to a write.
the non-blocking read is paused due to a write.
1
0
RO
NBRBUSY
4
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0
RO
reserved
3:1
Register Active
Description
Value
If
NBRBUSY
is set, the EPIRPSTD0 register is active.
If the
NBRBUSY
bit is clear, then neither EPIRPSTDx register is
active.
0
The EPIRPSTD1 register is active.
1
0
RO
ACTIVE
0
931
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller