Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T Datenbogen

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VP_CLKINx
2
3
1
4
4
SPRS605C – JULY 2009 – REVISED JUNE 2012
7.11.4 VPIF Electrical Data/Timing
Table 7-46. Timing Requirements for VPIF VP_CLKINx Inputs
(1)
(see
)
-1G
NO.
UNIT
MIN
MAX
1
t
c(VKI)
Cycle time, VP_CLKIN0/1/2/3
6.66
ns
2
t
w(VKIH)
Pulse duration, VP_CLKINx high
0.4C
ns
3
t
w(VKIL)
Pulse duration, VP_CLKINx low
0.4C
ns
4
t
t(VKI)
Transition time, VP_CLKINx
5
ns
(1)
C = VP_CLKINx period in ns.
Figure 7-38. Video Port Capture VP_CLKINx Timing
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Peripheral Information and Electrical Specifications
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