Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T Datenbogen

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TMDXEVM6467T
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SPRS605C – JULY 2009 – REVISED JUNE 2012
Table 3-4. Configuration Memory Map Summary (continued)
MASTER PERIPHERAL
START
END
SIZE
ACCESSIBILITY
ARM/EDMA
C64x+
ADDRESS
ADDRESS
(Bytes)
HPI
PCI
VLYNQ
0x01C6 6000
0x01C6 67FF
2K
ATA
x
x
x
0x01C6 6800
0x01C6 6FFF
2K
SPI
x
x
x
0x01C6 7000
0x01C6 77FF
2K
GPIO
x
x
x
0x01C6 7800
0x01C6 7FFF
2K
HPI
HPI
x
x
x
0x01C6 8000
0x01C7 FFFF
96K
Reserved
Reserved
x
x
x
0x01C8 0000
0x01C8 0FFF
4K
EMAC Control Registers
x
x
x
0x01C8 1000
0x01C8 1FFF
4K
EMAC Control Module Registers
x
x
x
Reserved
0x01C8 2000
0x01C8 3FFF
8K
EMAC Control Module RAM
x
x
x
0x01C8 4000
0x01C8 47FF
2K
MDIO Control Registers
x
x
x
0x01C8 4800
0x01D0 0FFF
498K
Reserved
Reserved
x
x
x
0x01D0 1000
0x01D0 13FF
1K
McASP0 Registers
McASP0 Registers
x
x
x
0x01D0 1400
0x01D0 17FF
1K
McASP0 Data Port
McASP0 Data Port
x
x
x
0x01D0 1800
0x01D0 1BFF
1K
McASP1 Registers
McASP1 Registers
x
x
x
0x01D0 1C00
0x01D0 1FFF
1K
McASP1 Data Port
McASP1 Data Port
x
x
x
0x01D0 2000
0x01DF FFFF
1016K
Reserved
Reserved
0x01E0 0000
0x01FF FFFF
2M
Reserved
Reserved
0x0200 0000
0x021F FFFF
2M
Reserved
Reserved
0x0220 0000
0x023F FFFF
2M
Reserved
Reserved
0x0240 0000
0x0FFF FFFF
220M
Reserved
Reserved
3.6
Pin Assignments
Extensive use of pin multiplexing is used to accommodate the largest number of peripheral functions in
the smallest possible package. Pin multiplexing is controlled using a combination of hardware
configuration at device reset and software programmable register settings. For more information on pin
muxing, see
Multiplexed Pin Configurations, of this document.
3.6.1
Pin Map (Bottom View)
through
show the bottom view of the package pin assignments in six quadrants (A,
B, C, D, E, and F).
Copyright © 2009–2012, Texas Instruments Incorporated
Device Overview
23
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