Texas Instruments CC2650DK Benutzerhandbuch
Modules
If more than one period of a signal is to be measured, the number of stop events to ignore before stopping
the measurement must be configured in [AUX_TDC:TRIGCNTLOAD], and the stop counter must be
enabled in [AUX_TDC:TRIGCNTCFG].
the measurement must be configured in [AUX_TDC:TRIGCNTLOAD], and the stop counter must be
enabled in [AUX_TDC:TRIGCNTCFG].
17.4.4.2.2 Saturation
The TDC can be configured in [AUX_TDC:SATCFG] to saturate and stop the measurement if the counter
values are larger than a configurable saturation limit. This process can be useful when an unknown signal
is input as start or stop source, to limit the maximum time the TDC is counting. The TDC saturates both
the SAT and DONE by setting the status bits in [AUX_TDC:STAT].
values are larger than a configurable saturation limit. This process can be useful when an unknown signal
is input as start or stop source, to limit the maximum time the TDC is counting. The TDC saturates both
the SAT and DONE by setting the status bits in [AUX_TDC:STAT].
17.4.4.2.3 Prescaler
If the input signal measured by the TDC has a high frequency (more than 1/10 of AUX clock frequency),
the TDC state machine might lose pulses. In this case, an optional prescaler can be used at the input of
the TDC.
the TDC state machine might lose pulses. In this case, an optional prescaler can be used at the input of
the TDC.
The prescaler can be connected as a start or stop event as any other event, and will then divide the input
signal by 16 or 64, configurable in [AUX_TDCIF:PRECTL:RATIO].
signal by 16 or 64, configurable in [AUX_TDCIF:PRECTL:RATIO].
Any event in [AUX_TDCIF:PRECTL:SRC] can be used as input.
The following limitations apply to using the prescaler:
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The prescaler must be set as both start and stop source for the TDC
•
The TDC must only be started in synchronous mode
•
Prescaler input frequency must be lower than 24 MHz
•
When configuring the prescaler, it must first be put in reset mode by clearing the bit
[AUX_TDCIF:PRECTL:RESET_N], and the TDC must be in idle mode.
[AUX_TDCIF:PRECTL:RESET_N], and the TDC must be in idle mode.
The TDC result does not automatically compensate for the prescaler ratio. This must be done in software,
by multiplying with the prescaler ratio.
by multiplying with the prescaler ratio.
17.4.4.3 Performing a Measurement
Starting and stopping a measurement is done by writing to [AUX_TDCIF:CTL.CMD].
In asynchronous mode, the start event must not arrive until seven AUX clock periods after the start bit is
written to. This mode is recommended for measurements in which software has control of the arrival time
of the start event.
written to. This mode is recommended for measurements in which software has control of the arrival time
of the start event.
For synchronous mode, the TDC start automatically synchronizes to the edge of the start signal. If the
start event is too close to the time when the start command is given, it will be missed, and the TDC will not
start until the next edge of the start signal. This mode is recommended for measuring periodic signals
such as clock inputs.
start event is too close to the time when the start command is given, it will be missed, and the TDC will not
start until the next edge of the start signal. This mode is recommended for measuring periodic signals
such as clock inputs.
Once a measurement is done, the counter value can be read out from [AUX_TDCIF:RESULT].
17.4.5 Semaphores
17.4.6 Oscillator Configuration Interface (DDI)
17.4.7 Analog Configuration Interface (ADI)
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Short description
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Access model (byte access)
•
Access methods (direct, set, clear)
1204
AUX – Sensor Controller with Digital and Analog Peripherals
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated