Texas Instruments CC2650DK Benutzerhandbuch
SSI Registers
20.7.1 SSI Registers
lists the memory-mapped registers for the SSI. All register offset addresses not listed in
should be considered as reserved locations and the register contents should not be modified.
Table 20-2. SSI Registers
Offset
Acronym
Register Name
Section
0h
CR0
Control 0
4h
CR1
Control 1
8h
DR
Data
Ch
SR
Status
10h
CPSR
Clock Prescale
14h
IMSC
Interrupt Mask Set and Clear
18h
RIS
Raw Interrupt Status
1Ch
MIS
Masked Interrupt Status
20h
ICR
Interrupt Clear
24h
DMACR
DMA Control
1367
SWCU117A – February 2015 – Revised March 2015
Synchronous Serial Interface (SSI)
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