Texas Instruments CC2650DK Benutzerhandbuch
Cortex-M3 Processor Registers
2.7.5.1
SSPSR Register (Offset = 0h) [reset = X]
SSPSR is shown in
and described in
Supported Sync Port Sizes This register represents a single port size that is supported on the device, that
is, 4, 2 or 1. This is to ensure that tools do not attempt to select a port width that an attached TPA cannot
capture.
is, 4, 2 or 1. This is to ensure that tools do not attempt to select a port width that an attached TPA cannot
capture.
Figure 2-131. SSPSR Register
31
30
29
28
27
26
25
24
RESERVED
R-X
23
22
21
20
19
18
17
16
RESERVED
R-X
15
14
13
12
11
10
9
8
RESERVED
R-X
7
6
5
4
3
2
1
0
RESERVED
FOUR
THREE
TWO
ONE
R-X
R-1h
R-X
R-1h
R-1h
Table 2-158. SSPSR Register Field Descriptions
Bit
Field
Type
Reset
Description
31-4
RESERVED
R
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
3
FOUR
R
1h
4-bit port size support 0x0: Not supported 0x1: Supported
2
THREE
R
X
3-bit port size support 0x0: Not supported 0x1: Supported
1
TWO
R
1h
2-bit port size support 0x0: Not supported 0x1: Supported
0
ONE
R
1h
1-bit port size support 0x0: Not supported 0x1: Supported
208
SWCU117A – February 2015 – Revised March 2015
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