Texas Instruments CC2650DK Benutzerhandbuch
PRCM Registers
6.2.1.31 GPTCLKDIV Register (Offset = CCh) [reset = X]
GPTCLKDIV is shown in
and described in
GPT Scalar
Figure 6-37. GPTCLKDIV Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
RESERVED
R-X
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
RESERVED
RATIO
R-X
R/W-X
Table 6-39. GPTCLKDIV Register Field Descriptions
Bit
Field
Type
Reset
Description
31-4
RESERVED
R
X
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
3-0
RATIO
R/W
X
Scalar used for GPTs. The division rate will be constant and ungated
for Run / Sleep / DeepSleep mode. For changes to take effect,
CLKLOADCTL.LOAD needs to be written Other values are not
supported.
for Run / Sleep / DeepSleep mode. For changes to take effect,
CLKLOADCTL.LOAD needs to be written Other values are not
supported.
0h = Divide by 1
1h = Divide by 2
2h = Divide by 4
3h = Divide by 8
4h = Divide by 16
5h = Divide by 32
6h = Divide by 64
7h = Divide by 128
8h = Divide by 256
460
Power, Reset, and Clock Management
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated