Texas Instruments CC2650DK Benutzerhandbuch
PRCM Registers
6.2.4 DDI_0_OSC Registers
lists the memory-mapped registers for the DDI_0_OSC. All register offset addresses not listed
in
should be considered as reserved locations and the register contents should not be
modified.
Table 6-85. DDI_0_OSC Registers
Offset
Acronym
Register Name
Section
0h
CTL0
Control 0
4h
CTL1
Control 1
8h
RADCEXTCFG
RADC External Configuration
Ch
AMPCOMPCTL
Amplitude Compensation Control
10h
AMPCOMPTH1
Amplitude Compensation Threashold 1
14h
AMPCOMPTH2
Amplitude Compensation Threashold 2
18h
ANABYPASSVAL1
Analog Bypass Values 1
1Ch
ANABYPASSVAL2
Analog Bypass Values 2
20h
ATESTCTL
Analog Test Control
24h
ADCDOUBLERNANOAMPCTL
ADC Doubler Nanoamp Control
28h
XOSCHFCTL
XOSCHF Control
2Ch
LFOSCCTL
Low Frequency Oscillator Control
30h
RCOSCHFCTL
RCOSCHF Control
34h
STAT0
Status 0
38h
STAT1
Status 1
3Ch
STAT2
Status 2
509
SWCU117A – February 2015 – Revised March 2015
Power, Reset, and Clock Management
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