Texas Instruments CC2650DK Benutzerhandbuch
SRAM
7.9
SRAM
The CC26xx provides 20-kB single-cycle on-chip SRAM with full retention in all power modes, except
shutdown. Retention can be configured in 4-kB blocks to save power.
shutdown. Retention can be configured in 4-kB blocks to save power.
Because read-modify-write (RMW) operations are very time consuming, ARM has introduced bit-banding
technology in the Cortex-M3 processor. With a bit-band-enabled processor, certain regions in the memory
map (SRAM and peripheral space) can use address aliases to access individual bits in one atomic
operation.
technology in the Cortex-M3 processor. With a bit-band-enabled processor, certain regions in the memory
map (SRAM and peripheral space) can use address aliases to access individual bits in one atomic
operation.
Data can also be transferred to and from the SRAM using the micro-direct memory access controller
(
(
μDMA). The Cortex M0 in the RF Core also has access to the system RAM.
670
Versatile Instruction Memory System (VIMS)
SWCU117A – February 2015 – Revised March 2015
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