Texas Instruments CC2650DK Benutzerhandbuch
Customer Configuration (CCFG)
9.1.1.7
FREQ_OFFSET Register (Offset = FC4h) [reset = FFFFFFFFh]
FREQ_OFFSET is shown in
and described in
Frequency Offset
Figure 9-7. FREQ_OFFSET Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
HF_COMP_P0
R/W-FFFFh
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
HF_COMP_P1
HF_COMP_P2
R/W-FFh
R/W-FFh
Table 9-8. FREQ_OFFSET Register Field Descriptions
Bit
Field
Type
Reset
Description
31-16
HF_COMP_P0
R/W
FFFFh
Reserved for future use. Software should not rely on the value of a
reserved. Writing any other value than the reset/default value may
result in undefined behavior.
reserved. Writing any other value than the reset/default value may
result in undefined behavior.
15-8
HF_COMP_P1
R/W
FFh
Reserved for future use. Software should not rely on the value of a
reserved. Writing any other value than the reset/default value may
result in undefined behavior.
reserved. Writing any other value than the reset/default value may
result in undefined behavior.
7-0
HF_COMP_P2
R/W
FFh
Reserved for future use. Software should not rely on the value of a
reserved. Writing any other value than the reset/default value may
result in undefined behavior.
reserved. Writing any other value than the reset/default value may
result in undefined behavior.
695
SWCU117A – February 2015 – Revised March 2015
Device Configuration
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