Texas Instruments CC2650DK Benutzerhandbuch
Factory Configuration (FCFG)
9.2.1.71 MISC_OTP_DATA_1 Register (Offset = 398h) [reset = X]
MISC_OTP_DATA_1 is shown in
and described in
.
Misc OSC Control
Figure 9-92. MISC_OTP_DATA_1 Register
31
30
29
28
27
26
25
24
RESERVED
PEAK_DET_ITRIM
HP_BUF_ITRIM
R-7h
R-X
R-X
23
22
21
20
19
18
17
16
LP_BUF_ITRIM
DBLR_LOOP_FILTER_RESET_
HPM_IBIAS_WAIT_CNT
VOLTAGE
R-X
R-X
R-100h
15
14
13
12
11
10
9
8
HPM_IBIAS_WAIT_CNT
LPM_IBIAS_WAIT_CNT
R-100h
R-3Fh
7
6
5
4
3
2
1
0
LPM_IBIAS_WAIT_CNT
IDAC_STEP
R-3Fh
R-8h
Table 9-94. MISC_OTP_DATA_1 Register Field Descriptions
Bit
Field
Type
Reset
Description
31-29
RESERVED
R
7h
Software should not rely on the value of a reserved. Writing any
other value than the reset value may result in undefined behavior.
other value than the reset value may result in undefined behavior.
28-27
PEAK_DET_ITRIM
R
X
Trim value for DDI_0_OSC:XOSCHFCTL.PEAK_DET_ITRIM.
26-24
HP_BUF_ITRIM
R
X
Trim value for DDI_0_OSC:XOSCHFCTL.HP_BUF_ITRIM.
23-22
LP_BUF_ITRIM
R
X
Trim value for DDI_0_OSC:XOSCHFCTL.LP_BUF_ITRIM.
21-20
DBLR_LOOP_FILTER_R
R
X
Trim value for
ESET_VOLTAGE
DDI_0_OSC:ADCDOUBLERNANOAMPCTL.DBLR_LOOP_FILTER_
RESET_VOLTAGE.
RESET_VOLTAGE.
19-10
HPM_IBIAS_WAIT_CNT
R
100h
Trim value for DDI_0_OSC:RADCEXTCFG.HPM_IBIAS_WAIT_CNT.
9-4
LPM_IBIAS_WAIT_CNT
R
3Fh
Trim value for DDI_0_OSC:RADCEXTCFG.LPM_IBIAS_WAIT_CNT.
3-0
IDAC_STEP
R
8h
Trim value for DDI_0_OSC:RADCEXTCFG.IDAC_STEP.
788
Device Configuration
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated