Texas Instruments DP130 Single-Source Evaluation Module DP130SSEVM DP130SSEVM Datenbogen
Produktcode
DP130SSEVM
SLLSE57D – APRIL 2011 – REVISED JULY 2013
POWER SUPPLY ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
(1)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
CCDP1HBR2
Supply Current 1 DP Lanes Maximum conditions: IN/OUT at 5.4Gbps
40
70
mA
PRBS,V
OD
= 510mVpp, P
E
= 6dB; AUX at 1Mbps
I
CCDP2HBR2
Supply Current 2 DP Lanes
70
125
mA
PRBS, V
ID
= 1000mVpp; EQ = 3dB
Typical Conditions: IN/OUT at 5.4Gbps
I
CCDP4HBR2
Supply Current 4 DP Lanes
130
230
mA
PRBS,V
OD
= 510mVpp, P
E
= 0dB AUX and I
2
C
Idle; EQ = 3dB
I
CCDP1HBR
Supply Current 1 DP Lanes
40
mA
Main Link at 2.7Gbps PRBS, V
OD
=510mVpp,
I
CCDP2HBR
Supply Current 2 DP Lanes
70
mA
P
E
= 0dB; AUX and I
2
C Idle; EQ at 3dB fixed gain
I
CCDP4HBR
Supply Current 4 DP Lanes
130
mA
Main Link at 2.5Gbps PRBS, V
ID
= V
OD
= 600mVpp;
Supply Current TMDS
I
CCTMDS
170
mA
Mode
AUX Idle
I
SD
Shutdown supply current
Shutdown mode
3
4
mA
I
SBY
Standby supply current
Standby mode
3
4
mA
I
D3
D3 supply current
D3 power down mode
10
15
mA
I
OD
Squelch supply current
Output disable (Squelch) mode
35
50
mA
(1)
Values are V
DDD
supply measurements; V
CC
supply (DS package option) measurements are 5mA (typical) and 8mA (max), with zero
current in shutdown and standby modes.
MAIN LINK ELECTRICAL CHARACTERISTICS
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
OD(L0)
238
340
442
mV
PP
V
OD(L1)
357
510
663
mV
PP
V
PRE(L0)
; 675Mbps D10.2 Test Pattern; BOOST=01
V
OD(L2)
Output differential voltage swing
484
690
897
mV
PP
V
OD(L3)
700
1000
1300
mV
PP
V
OD(TMDS)
675Mbps D10.2 Test Pattern; BOOST=01
420
600
780
mV
PP
ΔV
OD(L0L1)
1.7
3.5
5.3
dB
ΔV
ODn
= 20×log(V
ODL(n+1
) / V
ODL(n)
) measured in
Output peak-to-peak differential
ΔV
OD(L1L2)
compliance with PHY CTS1.1D15 section 3.2 at
1.6
2.5
3.5
dB
voltage delta
test point TP2 using special CTS test board
ΔV
OD(L2L3)
0.8
3.5
6.0
dB
V
PRE(L0)
All V
OD
options
0
0.25
dB
V
PRE(L1)
V
OD
= V
OD(L0)
, V
OD(L1)
, or V
OD(L2)
; BOOST=01
3.5
dB
Driver output pre-emphasis
(default)
(default)
V
PRE(L2)
V
OD
= V
OD(L0)
or V
OD(L1)
; BOOST=01
6.0
dB
V
PRE(L3)
V
OD
= V
OD(L0)
; BOOST=01
9.5
dB
BOOST=10
10%
dB
V
PRE(BOOST)
Output V
PRE
boost
BOOST=00
–10%
dB
ΔV
PRE(L1L0)
2.0
dB
Measured in compliance with PHY CTS1.1D15
ΔV
PRE(L2L1)
Pre-emphasis delta
section 3.3 at test point TP2 using special CTS test
1.6
dB
board
ΔV
PRE(L3L2)
1.6
dB
Non-transition bit voltage
ΔV
ConsBit
See CTS spec section 3.3.5
30%
variation
A
EQ(HBR)
Equalizer gain for RBR/HBR
9
dB
See
and for EQ setting details;
A
EQ(HBR2)
Equalizer gain for HBR2
18
dB
Max value represents the typical value for the
maximum configurable EQ setting
maximum configurable EQ setting
A
EQ(TMDS)
Equalizer gain for TMDS
3
dB
R
OUT
Driver output impedance
50
Ω
R
IN
Input termination impedance
40
50
60
Ω
V
Iterm
Input termination voltage
AC coupled; self-biased
0
2
V
Steady state output common-
V
OCM(SS)
0
2
V
mode voltage
12
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