Texas Instruments MuxIt-EVM Evaluation Module MUXIT-EVM MUXIT-EVM Datenbogen
Produktcode
MUXIT-EVM
Deserializer Board
2-7
EVM Hardware Contents
Figure 2–3. Deserializer Board Simplified Block Diagram
PLL/Multiplier
SN65LVDS150 (U1)
Multiplier Select
M1
M2
M3
M4
BS
M2
M3
M4
BS
S1
Band Select
Multiplexed
Clock (LVDS)
Clock (LVDS)
Deserializer
SN65LVDS152 (U2)
10 Bits
DO-9
P1
DO-0
DO-9
DO-0
Cascade
Data (LVDS)
Data (LVDS)
Deserializer
SN65LVDS152 (U3)
10 Bits
DO-9
P2
DO-0
DO-9
DO-0
VCC
Cascade
Enable
Enable
LCI
±
(LVDS)
J2-4/5
Cascade_DI
±
(LVDS)
J2-7/8
J2
Deserializer
SN65LVDS152 (U4)
10 Bits
DO-9
P3
DO-0
DO-9
DO-0
Serial_DI
±
(LVDS)
J2-10/11
J2
J2
Clock Out
DCO
P1
Clock Out
DCO
P2
Clock Out
DCO
P3
Board layer art, bill of materials and a schematic diagram for the deserializer
board are shown in Appendix A.
board are shown in Appendix A.