Texas Instruments Evaluation Module for Integrated 3.3V / 5V Power LDO with Clock Output TPS51103EVM TPS51103EVM Datenbogen
Produktcode
TPS51103EVM
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EVM Assembly Drawings and Layout
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EVM Assembly Drawings and Layout
through
show the design of the TPS51103EVM printed circuit board (PCB). This EVM
was designed using a two-layer, 2-oz. copper-clad PCB with all components on the top side to allow the
user to easily view, probe, and evaluate the TPS51103 control IC in a practical application. Moving
components to both sides of the PCB or using additional internal layers can offer additional size reduction
for space constrained systems.
user to easily view, probe, and evaluate the TPS51103 control IC in a practical application. Moving
components to both sides of the PCB or using additional internal layers can offer additional size reduction
for space constrained systems.
Note:
Board layouts are not to scale. These drawings are intended to show how the board is laid
out; they are not intended to be used for manufacturing TPS51103EVM PCBs.
out; they are not intended to be used for manufacturing TPS51103EVM PCBs.
Figure 17. TPS51103EVM Component Placement (Top View)
Figure 18. TPS51103EVM Top Copper (Top View)
SLUU303A – JUNE 2008 – Revised SEPTEMBER 2008 Using the TPS51103EVM Integrated 3.3-V/5-V Power LDO with Clock Output
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