Microchip Technology DM164134 Datenbogen

DS41159E-page 244

© 2006 Microchip Technology Inc.

The value that is in the ADRESH/ADRESL registers is
not modified for a Power-on Reset. The ADRESH/
ADRESL registers will contain unknown data after a
Power-on Reset.

After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 20.1
“A/D Acquisition Requirements”. After this acquisi-
tion time has elapsed, the A/D conversion can be
started. The following steps should be followed for
doing an A/D conversion:

1.

Configure the A/D module:

• Configure analog pins, voltage reference and 

digital I/O (ADCON1)

• Select A/D input channel (ADCON0)

• Select A/D conversion clock (ADCON0)

• Turn on A/D module (ADCON0)

2.

Configure A/D interrupt (if desired):

• Clear ADIF bit 

• Set ADIE bit 

• Set  GIE  bit

3.

Wait the required acquisition time.

4.

Start conversion:

• Set GO/DONE bit (ADCON0)

5.

Wait for A/D conversion to complete, by either:

• Polling for the GO/DONE bit to be cleared

OR

• Waiting for the A/D interrupt

6.

Read A/D Result registers (ADRESH/ADRESL);
clear bit ADIF if required.

7.

For next conversion, go to step 1 or step 2 as
required. The A/D conversion time per bit is
defined as T

AD

. A minimum wait of 2 T

AD

 is

required before next acquisition starts.

For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C

HOLD

) must be allowed

to fully charge to the input channel voltage level. The
analog input model is shown in Figure 20-2. The
source impedance (R

S

) and the internal sampling

switch (R

SS

) impedance directly affect the time

required to charge the capacitor C

HOLD

. The sampling

switch (R

SS

) impedance varies over the device voltage

(V

DD

). The source impedance affects the offset voltage

at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 k

Ω. After the analog input channel is

selected (changed), this acquisition must be done
before the conversion can be started.    

When the conversion is started, the
holding capacitor is disconnected from the
input pin.

V

AIN

C

PIN

Rs

ANx

5 pF

V

DD

V

T

 = 0.6V

V

T

 = 0.6V

I 

LEAKAGE

R

IC

 

≤ 1k

Sampling
Switch

SS

R

SS

C

HOLD

 = 120 pF

V

SS

6V

Sampling Switch

5V
4V
3V
2V

5 6 7 8 9 10 11

(k

Ω)

V

DD

± 500 nA

Legend: C

PIN

V

T

I 

LEAKAGE

R

IC

SS

C

HOLD

= input capacitance

= threshold voltage
= leakage current at the pin due to

= interconnect resistance
= sampling switch

= sample/hold capacitance (from DAC)

various junctions