Microchip Technology DM164134 Datenbogen
PIC18FXX8
DS41159E-page 246
© 2006 Microchip Technology Inc.
20.2
Selecting the A/D Conversion
Clock
Clock
The A/D conversion time per bit is defined as T
AD
. The
A/D conversion requires 12 T
AD
per 10-bit conversion.
The source of the A/D conversion clock is software
selectable. The seven possible options for T
selectable. The seven possible options for T
AD
are:
• 2 T
OSC
• 4 T
OSC
• 8 T
OSC
• 16 T
OSC
• 32 T
OSC
• 64 T
OSC
• Internal RC oscillator.
For correct A/D conversions, the A/D conversion clock
(T
(T
AD
) must be selected to ensure a minimum T
AD
time
of 1.6
μs.
Table 20-1 shows the resultant T
AD
times derived from
the device operating frequencies and the A/D clock
source selected.
source selected.
20.3
Configuring Analog Port Pins
The ADCON1, TRISA and TRISE registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their corresponding
TRIS bits set (input). If the TRIS bit is cleared (output),
the digital output level (V
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their corresponding
TRIS bits set (input). If the TRIS bit is cleared (output),
the digital output level (V
OH
or V
OL
) will be converted.
The A/D operation is independent of the state of the
CHS2:CHS0 bits and the TRIS bits.
CHS2:CHS0 bits and the TRIS bits.
TABLE 20-1:
T
AD
vs. DEVICE OPERATING FREQUENCIES
TABLE 20-2:
T
AD
vs. DEVICE OPERATING FREQUENCIES (FOR EXTENDED, LF DEVICES)
Note 1: When reading the port register, all pins
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an
analog input. Analog levels on a digitally
configured input will not affect the
conversion accuracy.
read as cleared (a low level). Pins config-
ured as digital inputs will convert an
analog input. Analog levels on a digitally
configured input will not affect the
conversion accuracy.
2: Analog levels on any pin that is defined as
a digital input (including the AN4:AN0
pins) may cause the input buffer to
consume current that is out of the
device’s specification.
pins) may cause the input buffer to
consume current that is out of the
device’s specification.
AD Clock Source (T
AD
)
Device Frequency
Operation
ADCS2:ADCS0
20 MHz
5 MHz
1.25 MHz
333.33 kHz
2 T
OSC
000
100 ns
(2)
400 ns
(2)
1.6
μs
6
μs
4 T
OSC
100
200 ns
(2)
800 ns
(2)
3.2
μs
12
μs
8 T
OSC
001
400 ns
(2)
1.6
μs
6.4
μs
24
μs
(3)
16 T
OSC
101
800 ns
(2)
3.2
μs
12.8
μs
48
μs
(3)
32 T
OSC
010
1.6
μs
6.4
μs
25.6
μs
(3)
96
μs
(3)
64 T
OSC
110
3.2
μs
12.8
μs
51.2
μs
(3)
192
μs
(3)
RC
011
2-6
μs
(1)
2-6
μs
(1)
2-6
μs
(1)
2-6
μs
(1)
Legend: Shaded cells are outside of recommended range.
Note 1:
Note 1:
The RC source has a typical T
AD
time of 4
μs.
2:
These values violate the minimum required T
AD
time.
3:
For faster conversion times, the selection of another clock source is recommended.
AD Clock Source (T
AD
)
Device Frequency
Operation
ADCS2:ADCS0
4 MHz
2 MHz
1.25 MHz
333.33 kHz
2 T
OSC
000
500 ns
(2)
1.0
μs
(2)
1.6
μs
(2)
6
μs
4 T
OSC
100
1.0
μs
(2)
2.0
μs
(2)
3.2
μs
(2)
12
μs
8 T
OSC
001
2.0
μs
(2)
4.0
μs
6.4
μs
24
μs
(3)
16 T
OSC
101
4.0
μs
(2)
8.0
μs
12.8
μs
48
μs
(3)
32 T
OSC
010
8.0
μs
16.0
μs
25.6
μs
(3)
96
μs
(3)
64 T
OSC
110
16.0
μs
32.0
μs
51.2
μs
(3)
192
μs
(3)
RC
011
3-9
μs
(1)
3-9
μs
(1)
3-9
μs
(1)
3-9
μs
(1)
Legend: Shaded cells are outside of recommended range.
Note 1:
Note 1:
The RC source has a typical T
AD
time of 6
μs.
2:
These values violate the minimum required T
AD
time.
3:
For faster conversion times, the selection of another clock source is recommended.