Freescale Semiconductor KIT912F634EVME Evaluation Kit KIT912F634EVME KIT912F634EVME Datenbogen
Produktcode
KIT912F634EVME
Functional Description and Application Information
MM912F634 - Analog Die Trimming
MM912F634
Freescale Semiconductor
155
4.25.1.2
Register Descriptions
4.25.1.2.1
Trimming Register 0 (CTR0)
4.25.1.2.2
Trimming Register 1 (CTR1)
Table 204. Trimming Register 0 (CTR0)
Offset
0xF0
Access: User read/write
7
6
5
4
3
2
1
0
R
LINTRE
LINTR
WDCTRE
CTR0_4
CTR0_3
WDCTR2
WDCTR1
WDCTR0
W
Reset
0
0
0
0
0
0
0
0
Note:
147. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.
Table 205. CTR0 - Register Field Descriptions
Field
Description
7
LINTRE
LIN trim enable
0 - no trim can be done
1- trim can be done by setting LINTR bit
0 - no trim can be done
1- trim can be done by setting LINTR bit
6
LINTR
LIN trim bit
0 - default slope
1 - adjust the slope
0 - default slope
1 - adjust the slope
5
WDCTRE
Watchdog trim enable
0 - no trim can be done
1 - trim can be done by setting WDCTR[2:0] bits
0 - no trim can be done
1 - trim can be done by setting WDCTR[2:0] bits
4
CTR0_4
Spare Trim bit 4
3
CTR0_3
Spare Trim bit 3
2-0
WDCTR2…0
Watchdog clock trim (Trim effect to the 100 kHz Watch dog base clock)
000: 0%
001: +5%
010: +10%
011: +15%
100: -20%
101: -15%
110: -10%
111: -5%
000: 0%
001: +5%
010: +10%
011: +15%
100: -20%
101: -15%
110: -10%
111: -5%
Table 206. Trimming Register 1 (CTR1)
Offset
0xF1
Access: User read/write
7
6
5
4
3
2
1
0
R
BGTRE
CTR1_6
BGTRIMUP
BGTRIMDN
IREFTRE
IREFTR2
IREFTR1
IREFTR0
W
Reset
0
0
0
0
0
0
0
0
Note:
148. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.