Freescale Semiconductor Tower System Module S12G240 TWR-S12G240 TWR-S12G240 Datenbogen
Produktcode
TWR-S12G240
S12 Clock, Reset and Power Management Unit (S12CPMU)
MC9S12G Family Reference Manual,
Rev.1.23
368
Freescale Semiconductor
shows a block diagram of the XOSCLCP.
Figure 10-2. XOSCLCP Block Diagram
EXTAL
XTAL
Gain Control
VDD = 1.8 V
Rf
OSCCLK_LCP
Peak
Detector
VSS
VSS
VSS
C1
C2
Quartz Crystals
Ceramic Resonators
or
Clock
Monitor
monitor fail