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Freescale Semiconductor Tower System Module S12G240 TWR-S12G240 TWR-S12G240 Datenbogen

Produktcode
TWR-S12G240
Download
Seite von 1292
S12 Clock, Reset and Power Management Unit (S12CPMU)
MC9S12G Family Reference Manual,
Rev.1.23
372
Freescale Semiconductor
0x02F3 CPMUACLKTR
R
ACLKTR5
ACLKTR4
ACLKTR3
ACLKTR2 ACLKTR1 ACLKTR0
0
0
W
0x02F4
CPMUAPIRH
R
APIR15
APIR14
APIR13
APIR12
APIR11
APIR10
APIR9
APIR8
W
0x02F5
CPMUAPIRL
R
APIR7
APIR6
APIR5
APIR4
APIR3
APIR2
APIR1
APIR0
W
0x02F6
RESERVEDCP
MUTEST3
R
0
0
0
0
0
0
0
0
W
0x02F7
RESERVED
R
0
0
0
0
0
0
0
0
W
0x02F8
CPMU
IRCTRIMH
R
TCTRIM[4:0]
0
IRCTRIM[9:8]
W
0x02F9
CPMU
IRCTRIML
R
IRCTRIM[7:0]
W
0x02FA
CPMUOSC
R
OSCE
Reserved
OSCPINS_
EN
Reserved
W
0x02FB
CPMUPROT
R
0
0
0
0
0
0
0
PROT
W
0x02FC
RESERVEDCP
MUTEST2
R
0
0
0
0
0
0
0
0
W
Addres
s
Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented or Reserved
Figure 10-3. CPMU Register Summary