Freescale Semiconductor MSC8156 Evaluation Module MSC8156EVM MSC8156EVM Benutzerhandbuch

Freescale Semiconductor

 

19-25

Figure 19-25 illustrates the pointers associated with receive and transmit buffers that are mapped 
on the system I/F.

Figure 19-25.  Data Buffer Location in Main Memory

Receive Global Base Address

d

a

ta

 bu

ff

e

r k 

bas

e a

ddr

ess

TDMxRGBA << 16

Receive Data Buffer

Memory Map

8 bytes

channel k

(A/

μ

 law active)

(transparent channel)

transparent channel

Receive Data Buffer i

RDBS 
Bytes

RDBSx2
Bytes

RCPRk[RCDBA]

Transmit Global Base Address

TDMxTGBA << 16

Transmit Data Buffer

channel m

(A/

μ

 law active)

Bytes

TDBS
Bytes

TDBSx2

RCPRi[RCDBA]

Transmit data buffer l

TCPRl[TCDBA]

TCPRm[TCDBA]

0000

RCDBA 

RCPRx

RGBA

RGBA

Receive data buffer i base address

0

3

23 

31

16

0000

TCDBA 

TCPRx

TGBA

TGBA

Transmit data buffer i base address

0

3

23 

31

16