Freescale Semiconductor MSC8156 Evaluation Module MSC8156EVM MSC8156EVM Benutzerhandbuch

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 Freescale 

Semiconductor

circuits and dedicated signals on the SC3850 core avoid sacrificing user-accessible internal 
resource. As the DSP applications grow in both size and complexity, the OCE module provides 
many features of the breakpoints, conditional breakpoints, breakpoints on data-bus values, and 
event detection that offer the user non-destructive access to peripherals, variety in profiling, a 
program tracing buffer, and real-time access to memory. 

There are some restrictions about using data breakpoints with some multi-variable 
move instructions. Multi-variable move instructions utilize the wide memory data bus 
to move several data elements in one access. For example, MOVE.2W transfers two 
16-bit items as one 32-bit access. When the OCE data event detection channel (EDCD) 
is configured to detect a byte, word, or long reference data value and the core performs 
a multi-variable move, the reference value is searched in the positions on the bus 
where the variable could appear. In the MOVE.2W example, an EDCD search for a 
16-bit value should be performed on bits 15–0 and 31–16 of the bus concurrently. 
However, for some SC3850 multi-variable byte move instructions, the EDCD does not 
check for the reference value in all optional positions of a byte. Therefore, it is possible 
that the EDCD byte breakpoints can be missed in these cases. The affected instructions 
include: MOVE2.2B, MOVE2.4B, MOVE2.8B, MOVEU2.2B, MOVEU2.4B, and 
MOVEU.8B.

The MSC8156 TAP consists of five dedicated signal lines, a 16-state TAP controller, and three 
test data registers. A Boundary Scan Register (BSR) links most of the device signal connections 
into a single shift register. The test logic, which uses static logic design, is independent of the 
device system logic. The MSC8156 JTAG can do the following:

„ Perform boundary scan operations to check circuit-board electrical continuity.
„ Bypass the MSC8156 for a given circuit-board test by effectively reducing the Boundary 

Scan Register (BSR) to a single cell.

„ Sample the MSC8156 system connections during operation and transparently shift out the 

result in the BSR. Preload values to outputs prior to circuit board testing.

„ Disable the drive to outputs during circuit board testing.
„ Access the OCE controller and circuits to control a target system.
„ Give entry to Debug mode.
„ Query identification information (manufacturer, part number and version) from an 

MSC8156-based device.

„ Force test data onto the outputs of an MSC8156-based device while replacing its BSR in 

the serial data path with a single-bit register.

Precautions must be taken to ensure that the IEEE Std. 1149.1-like test logic does not 
interfere with non-test operation.