Freescale Semiconductor MSC8156 Evaluation Module MSC8156EVM MSC8156EVM Benutzerhandbuch
Produktcode
MSC8156EVM
Functional Description
MSC8156 Reference Manual, Rev. 2
Freescale Semiconductor
26-11
26.3.1.4
Turbo/Viterbi Decoding Flow
The MAPLE-B supports Turbo and Viterbi decoding for variable standards and configurations as
described in Section 26.1, Features. Both the Turbo and Viterbi processing are done using the
TVPE. Therefore, at given point in time the TVPE can either process Turbo decoding or Viterbi
decoding. There is no parallel processing of Turbo and Viterbi. The MAPLE-B initialization
sequence selects the desired Turbo standard operation mode (see Section 26.2, Modes of
Operation).
described in Section 26.1, Features. Both the Turbo and Viterbi processing are done using the
TVPE. Therefore, at given point in time the TVPE can either process Turbo decoding or Viterbi
decoding. There is no parallel processing of Turbo and Viterbi. The MAPLE-B initialization
sequence selects the desired Turbo standard operation mode (see Section 26.2, Modes of
Operation).
26.3.1.4.1
Turbo Standard Parameter Assumptions
The MAPLE-B supports Turbo decoding according to the following standards (MAPLE-B
operation modes): 3GLTE, WiMAX, 3GPP and 3GPP2. Table 26-1 lists some of the parameters
that the MAPLE-B uses for each of its operation modes.
operation modes): 3GLTE, WiMAX, 3GPP and 3GPP2. Table 26-1 lists some of the parameters
that the MAPLE-B uses for each of its operation modes.
Table 26-1. MAPLE-B Assumptions for Each Supported Standard
Operation
Mode
(Standard)
Turbo Rate
Turbo Trellis
Termination Method
Turbo Encoding
Method
Turbo Polynomials
3GLTE
1/3
Zero tail
Binary encoding
g
0
= 1 + D
2
+ D
3
(feedback)
g
1
= 1 + D + D
3
(parity)
WiMax
1/3
Tail biting
Duo-binary encoding
g
0
= 1 + D +D
3
(feedback)
g
1
= 1 + D
2
+ D
3
(Y parity)
g
2
= 1 + D
3
(W parity)
3GPP
1/3
Zero tail
Binary encoding
g
0
= 1 + D
2
+ D
3
(feedback)
g
1
= 1 + D + D
3
(parity)
3GPP2
1/5
Zero tail
Binary encoding
g
0
= 1 + D
2
+ D
3
(feedback)
g
1
= 1 + D + D
3
(Y
0
parity)
g
2
= 1 + D + D
2
+ D
3
(Y
1
parity)