Texas Instruments TURBO-DECODER COPROCESSOR 2 TMS320C6457 DSP Benutzerhandbuch
6.1
Peripheral Identification Register (PID)
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Registers
The peripheral identification register (PID) is a constant register that contains the ID and ID revision
number for that peripheral. The PID stores version information used to identify the peripheral. All bits
within this register are read-only (writes have no effect) meaning that the values within this register should
be hard-coded with the appropriate values and must not change from their reset state. The peripheral
identification register (PID) is shown in
number for that peripheral. The PID stores version information used to identify the peripheral. All bits
within this register are read-only (writes have no effect) meaning that the values within this register should
be hard-coded with the appropriate values and must not change from their reset state. The peripheral
identification register (PID) is shown in
and described in
. TCPIC0 configures the TCP.
Figure 32. Peripheral Identification Register (PID)
31
24
23
16
Reserved
TYPE
R-0
R-type
15
8
7
0
CLASS
REV
R-class
R-rev
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5. Peripheral Identification Register (PID) Field Descriptions
Bit
Field
Value
Description
31-24
Reserved
0
Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
23-16
TYPE
Peripheral type. Identifies the type of the peripheral. Set to 0x02 by default.
15-8
CLASS
Peripheral class. Identifies the class. Set to 0x11 by default.
7-0
REV
Peripheral revision. Identifies the revision level of the specific instance of the peripheral. This value
should begin at 0x01 and be incremented each time the design is revised.
should begin at 0x01 and be incremented each time the design is revised.
SPRUGK1 – March 2009
TMS320C6457 Turbo-Decoder Coprocessor 2
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