Texas Instruments TURBO-DECODER COPROCESSOR 2 TMS320C6457 DSP Benutzerhandbuch
7.1.4.2
ENDIAN_EXTR = 0
XT3
XT2
XT1
XT0
XT7
XT5
XT4
XT6
Base 0
Base 7
Endian_Extr=0
XT7
XT6
XT5
XT4
XT0
XT2
XT3
XT1
Endianness
manager
XT7
XT6
XT5
XT4
XT3
XT2
XT1
XT0
63
0
63
0
EDMA3
TCP
Kernel
Memory
8
Architecture
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Architecture
If ENDIAN_EXTR = 0, data are saved in word format (32 bits) in the DSP (see
).
Table 39. Extrinsic in DSP Memory (ENDIAN_EXTR =
0)
Address (hex bytes)
Data
Base
EXT3
Base + 1
EXT2
Base + 2
EXT1
Base + 3
EXT0
Base + 4
EXT7
Base + 5
EXT6
Base + 6
EXT5
Base + 7
EXT4
Figure 92. Extrinsic in DSP Memory (ENDIAN_EXTR = 0)
They have to be swapped as described in
and
.
Figure 93. Data Source - Kernel (ENDIAN_EXTR = 0)
63:56
55:48
47:40
39:32
31:24
23:16
15:8
7:0
EXT7
EXT6
EXT5
EXT4
EXT3
EXT2
EXT1
EXT0
Figure 94. Data Destination - EDMA3 (ENDIAN_EXTR = 0)
63:56
55:48
47:40
39:32
31:24
23:16
15:8
7:0
EXT3
EXT2
EXT1
EXT0
EXT7
EXT6
EXT5
EXT4
The TCP2 processing unit (MAP unit) is shown in
. The beta kernel performs the MAP algorithm
backward recursion and produces beta probabilities stored in the beta RAM. The alpha kernel performs
the forward recursion producing alpha probabilities, and the extrinsic block computes the extrinsics to be
stored in the extrinsics memory.
the forward recursion producing alpha probabilities, and the extrinsic block computes the extrinsics to be
stored in the extrinsics memory.
The processing unit implements the Max* Log-MAP algorithm using a sliding window technique that allows
parallel processing and reduces dramatic memory requirements.
parallel processing and reduces dramatic memory requirements.
SPRUGK1 – March 2009
TMS320C6457 Turbo-Decoder Coprocessor 2
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