Texas Instruments TURBO-DECODER COPROCESSOR 2 TMS320C6457 DSP Benutzerhandbuch
13.1.10 Unexpected Max and Min Iterations: MAXMINITER
13.2 Status
13.2.1
TCP2 Decoder Status: dec_busy
13.2.2
TCP2 Stopped Due to Error: ERR
13.2.3
TCP2 Waiting for Input Control Parameters Write: WIC
13.2.4
TCP2 Waiting for Interleaver Table Write: WINT
13.2.5
TCP2 Waiting for Systematics and Parities Write: WSP
13.2.6
TCP2 Waiting for A prioris Write: WAP
13.2.7
TCP2 Waiting for Extrinsics Read: REXT
13.2.8
TCP2 Waiting for Hard-Decisions Read: RHD
13.2.9
TCP2 Waiting for Output Parameters Read: ROP
13.2.10 TCP2 Halted Due to Emulation: emuhalt
13.2.11 TCP2 Active Map status: Active_map
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Errors and Status
The MAXMINITER bit is set to 1 if the minimum iterations are greater than the maximum iterations.
The TCP2 status register (TCPSTAT) reflects the state of the TCP2.
The dec_busy is set to 0 if the MAP decoder is in state 0. The dec_busy is set to 1 if the MAP decoder is
in states 1 to 8.
in states 1 to 8.
The ERR bit is set to 1 if the TCP2 has encountered an error. The ERR bit is reset by writing a new
START command in the TCP2 execution register (TCPEXE).
START command in the TCP2 execution register (TCPEXE).
The WIC bit is set to 1 when the TCP2 is waiting for the input configurations parameters to be written.
After the very first decoding is finished, an XEVT is generated to allow any ready user-channel to be
decoded and the WIC bit is set to 1.
After the very first decoding is finished, an XEVT is generated to allow any ready user-channel to be
decoded and the WIC bit is set to 1.
The WINT bit is set to 1 when the TCP2 is waiting for the interleaver table to be written.
The WSP bit is set to 1 when the TCP2 is waiting for the systematics and parities to be written.
The WAP bit is set to 1 when the TCP2 is waiting for the a prioris to be written.
The REXT bit is set to 1 when the TCP2 is waiting for the extrinsics to be read.
The RHD bit is set to 1 when the TCP2 is waiting for the hard decisions to be read.
The ROP bit is set to 1 when the TCP2 is waiting for the output parameters to be read.
The emuhalt bit is set to 1 when the TCP2 is halted due to emulation.
The active_map bit is set to 1 when the TCP2 is processing MAP1.
SPRUGK1 – March 2009
TMS320C6457 Turbo-Decoder Coprocessor 2
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