Motorola MPC8260 Benutzerhandbuch
29-73
MPC8260 PowerQUICC II UserÕs Manual
MOTOROLA
Part IV. Communications Processor Module
Table 29-37 describes AAL0 RxBD Þelds.
29.10.5.7 AAL5, AAL1 User-DeÞned CellÑRxBD Extension
In user-deÞned cell mode, the AAL5 and AAL1 RxBDs are extended to 32 bytes; see
Figure 29-49. Note that for AAL0, a complete cell, including the UDC header, is stored in
the buffer; the AAL0 BD size is always 8 bytes.
Figure 29-49. Note that for AAL0, a complete cell, including the UDC header, is stored in
the buffer; the AAL0 BD size is always 8 bytes.
Table 29-37. AAL0 RxBD Field Descriptions
Offset
Bits
Name
Description
0x00
0
E
Empty
0 The buffer associated with this RxBD is Þlled with received data, or data reception
0 The buffer associated with this RxBD is Þlled with received data, or data reception
was aborted due to an error. The core can examine or write to any Þelds of this
RxBD. The CP does not use this BD again while E remains zero.
RxBD. The CP does not use this BD again while E remains zero.
1 The Rx buffer is empty or reception is in progress. This RxBD and its associated
receive buffer are owned by the CP. Once E is set, the core should not write any
Þelds of this RxBD.
Þelds of this RxBD.
1
Ñ
Reserved, should be cleared.
2
W
Wrap (Þnal BD in table)
0 This is not the last BD in the RxBD table of the current channel.
1 This is the last BD in the RxBD table of the current channel. After this buffer has
0 This is not the last BD in the RxBD table of the current channel.
1 This is the last BD in the RxBD table of the current channel. After this buffer has
been used, the CP will receive incoming data into the Þrst BD in the table. The
number of RxBDs in this table is programmable and is determined only by the W bit.
The current table cannot exceed 64 Kbytes.
number of RxBDs in this table is programmable and is determined only by the W bit.
The current table cannot exceed 64 Kbytes.
3
I
Interrupt
0 No interrupt is generated after this buffer has been used.
1 An Rx buffer event is sent to the interrupt queue after the ATM controller uses this
0 No interrupt is generated after this buffer has been used.
1 An Rx buffer event is sent to the interrupt queue after the ATM controller uses this
buffer. FCCE[GINTx] is set when the INT_CNT reaches the global interrupt
threshold.
threshold.
4Ð5
Ñ
Reserved, should be cleared.
6
CM
Continuous mode
0 Normal operation.
1 The CP does not clear the E bit after this BD is closed, allowing the associated buffer
0 Normal operation.
1 The CP does not clear the E bit after this BD is closed, allowing the associated buffer
to be overwritten automatically when the CP next accesses this BD.
7Ð9
Ñ
Reserved, should be cleared.
10
CRE
Rx CRC error. Indicates a CRC10 error in the current AAL0 buffer. The CRE bit is
considered an error only if the received cell had a CRC10 Þeld in the cell payload.
considered an error only if the received cell had a CRC10 Þeld in the cell payload.
11
OAM
Operation and maintenance cell. If OAM is set, the current AAL0 buffer contains an
OAM cell. This cell is associated with the channel indicated by the channel code Þeld
(CC Þeld).
OAM cell. This cell is associated with the channel indicated by the channel code Þeld
(CC Þeld).
12-15
Ñ
Reserved, should be cleared.
0x02
Ñ
DL/CC
Data length/channel code. If RxBD[OAM] is set, this Þeld functions as CC; otherwise, it
is DL. Data length is the size in octets of this buffer (MRBLR value). Channel code
speciÞes the channel code associated with this OAM cell.
is DL. Data length is the size in octets of this buffer (MRBLR value). Channel code
speciÞes the channel code associated with this OAM cell.
0x04
Ñ
RXDBPTR Rx data buffer pointer. Points to the Þrst location of the associated buffer; may reside in
either internal or external memory. This pointer must be burst-aligned.