Техническое РуководствоInhaltsverzeichnisGeneral2Introduction2Glossary2Caution2References2General features3Part 1. Functional specification5Fixed disk subsystem description7Control Electronics7Head disk assembly7Actuator7Drive characteristics8Default logical drive parameters8PData sheet9World Wide Name Assignment9Drive organization9Performance characteristics10Defect flagging strategy14Electrical interface15Signal timings22Jumper settings(PATA model)35Environment41DC power requirements43Reliability46Mechanical specifications47Vibration and shock52Acoustics545.10 Identification labels545.11 Safety555.12 Electromagnetic compatibility56Part 2. Interface Specification57General58Introduction58Terminology58Deviations From Standard58Registers59Alternate Status Register59Command register59Cylinder High Register59Cylinder Low Register59Data Register60Device Control Register60Drive Address Register60Device/Head Register61Error Register627.10 Features Register627.11 Sector Count Register627.12 Sector Number Register627.13 Status Register62General Operation Descriptions64Reset Response64Diagnostic and Reset considerations65Sector Addressing Mode66Power Management Feature67SMART Function68Security Mode Feature Set70Host Protected Area Feature76Seek Overlap78Write Cache Function788.10 Reassign Function798.11 Power-up in Standby feature set808.12 Advanced Power Management feature set (APM)808.13 Automatic Acoustic Management feature set (AAM)818.14 Address Offset Feature818.15 48-bit Address Feature Set838.16 Streaming feature Set848.17 SATA BIST (Built-in Self Test)868.18 SATA Interface Power Management868.19 Software Setting Preservation878.20 SATA II Optional Features888.21 SCT Command Transport feature Set92Command Protocol111PIO Data In commands111PIO Data Out commands111Non-Data commands112DMA Data In commands and DMA Data Out commands112First-party DMA commands11310.0 Command Descriptions11510.1 Check Power Mode (E5h/98h)11910.211910.3 Configure Stream (51h)12010.4 Device Configuration Overlay (B1h)12210.5 Download Microcode (92h)12610.6 Execute Device Diagnostic (90h)12810.7 Flush Cache (E7h)12910.8 Flush Cache Ext (EAh)13010.9 Format Track (50h)131Format Unit (F7h)133Identify Device (ECh)134Idle (E3h/97h)145Idle Immediate (E1h/95h)14710.14 Initialize Device Parameters (91h)148Read Buffer (E4h)149Read DMA(C8h/C9h)150Read DMA Ext (25h)15210.18 Read FPDMA Queued (60h)154Read Log Ext (2Fh)156Read Multiple (C4h)169Read Multiple Ext (29h)17010.22 Read Native Max Address (F8h)17210.23 Read Native Max Address Ext (27h)17310.24 Read Sector(s) (20h/21h)175Read Sector(s) Ext (24h)177Read Stream DMA (2Ah)179Read Stream PIO (2Bh)182Read Verify Sector(s) (40h/41h)18410.29 Read Verify Sector(s) Ext (42h)186Recalibrate (1xh)18810.31 Security Disable Password (F6h)189Security Erase Prepare (F3h)191Security Erase Unit (F4h)192Security Freeze Lock (F5h)194Security Set Password (F1h)195Security Unlock (F2h)19710.37 Seek (7xh)19910.38 Set Features (EFh)20010.39 Set Max Address (F9h)20510.40 Set Max Address Ext (37h)21110.41 Set Multiple (C6h)21310.42 Sleep (E6h/99h)21410.43 SMART Function Set (B0h)21510.44 Standby (E2h/96h)23310.45 Standby Immediate (E0h/94h)23510.46 Write Buffer (E8h)23610.47 Write DMA (Cah/CBh)23710.48 Write DMA FUA Ext (3Dh)23910.49 Write DMA Ext (35h)24110.50 Write FPDMA Queued (61h)24310.51 Write Log Ext (3Fh)24510.52 Write Multiple (C5h)24710.53 Write Multiple Ext (39h)24910.54 Write Multiple FUA Ext (CEh)25110.55 Write Sector(s) (30h/31h)25310.56 Write Sector(s) Ext (34h)25510.57 Write Stream DMA (3Ah)25710.58 Write Stream PIO (3Bh)26010.59 Write Uncorrectable Ext (45h)26311.0 Timings266Table 1 Formatted capacity8Table 2 Mechanical positioning performance9Table 3 World Wide Name Assignment9Table 4 Command overhead10Table 5 Mechanical positioning performance11Table 6 Full stroke seek time11Table 7 Single Track Seek Time11Table 8 Latency Time12Table 9 Drive ready time12Table 10 Mode transition times13Table 11 Table of signals17Table 12 Signal special definitions for Ultra DMA17Table 13 Interface connector pins and I/O signals20Table 14 Parameter descriptions21Table 15 System reset timing22Table 16 PIO cycle timings23Table 17 Multiword DMA cycle timings25Table 18 Ultra DMA cycle timings (Initiating Read)26Table 19 Ultra DMA cycle timings (Host pausing Read)27Table 20 Ultra DMA cycle timings (Host terminating Read)28Table 21 Ultra DMA cycle timings (Device Terminating Read)29Table 22 Ultra DMA cycle timings (Initiating Write)30Table 23 Ultra DMA cycle timings (Device Pausing Write)31Table 24 Ultra DMA cycle timings (Device terminating Write)32Table 25 Ultra DMA cycle timings (Host Terminating Write)33Table 26 I/O address map34Table 27 Temperature and humidity41Table 28 Input voltage43Table 29 Power supply current of 2 Disk PATA models43Table 30 Power supply current of 1 Disk PATA models44Table 31 Power supply current of 2 Disk SATA models44Table 32 Power supply current of 1 Disk SATA models45Table 33 Power supply generated ripple at drive power connector45Table 34 Physical Dimensions48Table 35 Random vibration PSD profile break points (operating)52Table 36 Random vibration PSD profile break points (nonoperating)52Table 37 Sinusoidal shock wave53Table 38 Rotational Shock53Table 39 Sound power levels54Table 40 Alternate Status Register59Table 41 Device Control Register60Table 42 Drive Address Register60Table 43 Device/Head Register61Table 44 Error Register62Table 45 Status Register63Table 46 Reset Response64Table 47 Default Register Values65Table 48 Diagnostic Codes65Table 49 Power conditions68Table 50 Command table for device lock operation - 174Table 51 Command table for device lock operation - 275Table 52 Phy Event Counter Identifiers89Table 53 READ LOG EXT Log Page 11h data structure definition90Table 54 SCT Log Page and direction92Identify Device Information Word 20692Output Registers of SCT Command Using SMART93Input Registers of SCT Command Using SMART93Input Registers of SCT Command Using Write Log Ext94Output Registers of SCT Command Using Write Log Ext94Key Sector Format95SCT Action Code List95Extended Status Code96Input Registers of SCT Data Transfer Using SMART97Input Registers of SCT Data Transfer using Read/Write Log Ext97Intput Registers of SCT Status Request Using SMART98Input Registers of SCT Status Request Using Read Log Ext98Data Format of SCT Status Response100LBA Segment Access (Inputs)101LBA Segment Access (Outputs)101Error Recovery Control command (Inputs)104Error Recovery Control command (Onputs)104Feature Control command (Inputs)105Feature Control command (Outputs)105Feature Code List106SCT Data Table command (Inputs)107SCT Data Table command (Outputs)107Table ID107Data Format of HDA Absolute Temperature History Table109Command Set115Command Set (Subcommand)117Check Power Mode Command (E5h/98h)119Configure Stream Command (51h)120Device Configuration Overlay Command (B1h)122Device Configuration Overlay Features register values122Device Configuration Overlay Data structure124DCO error information definition125Download Microcode Command (92h)S126Execute Device Diagnostic Command (90h)128Flush Cache Command (E7h)129Flush Cache Ext Command (EAh)130Format Track Command(50h)131Format Unit Command (F7h)133Identify Device Command (ECh)134Identify device information135Idle Command (E3h/97h)145Idle Immediate Command (E1h/95h)147Initialize Device Parameters Command (91h)148Read Buffer Command (E4h)149Read DMA Command (C8h/C9h)150Read DMA Ext Command (25h)152Read FPDMA Queued Command (60h)154Read Log Ext Command (2Fh)156Log Address Definition157General Purpose Log Directory158Extended Comprehensive SMART Error Log159Extended Error log data structure160Command data structure160Error data structure161Extended Self-test log data structure162Extended Self-test log descriptor entry163Command Error information164Read Stream Error Log165Stream Error Log entry166Write Stream Error Log167Streaming Performance Parameters log168Sector Time Array Entry (Linearly Interpolated)168Position Array Entry (Linearly Interpolated)168Access Time Array Entry (Linearly Interpolated)168Read Multiple Command (C4h)169Read Multiple Ext Command (29h)170Read Native Max ADDRESS (F8h)172Read Native Max Address Ext (27h)173Read Sector(s) Command (20h/21h)175Read Sector(s) Ext Command (24h)177Read Stream DMA Command (2Ah)179Read Stream PIO Command (2Bh)182Read Verify Sector(s) Command (40h/41h)184Read Verify Sector(s) Ext Command (42h)186Recalibrate Command (1xh)188Security Disable Password Command (F6h)189Password Information for Security Disable Password command190Security Erase Prepare Command (F3h)191Security Erase Unit Command (F4h)192Erase Unit Information193Security Freeze Lock Command (F5h)194Security Set Password Command (F1h)195Security Set Password Information196Security Unlock Command (F2h)197Security Unlock Information198Seek Command (7xh)199Set Features Command (EFh)200Set Max ADDRESS (F9h)205Set Max set Password207Set Max Set Password data contents207Set Max Lock208Set Max Unlock (F9h)209Set Max Freeze Lock (F9h)210Set Max Address Ext Command (37h)211Set Multiple Command (C6h)213Sleep Command (E6h/99h)214SMART Function Set Command (B0h)215Log sector addresses218Device Attribute Data Structure220Individual Attribute Data Structure221Device Attribute Thresholds Data Structure225Individual Threshold Data Structure225SMART Log Directory226SMART summary error log sector227Error log data structure228Command data structure228Error data structure229Self-test log data structure230Selective self-test log data structure231Selective self-test feature flags231SMART Error Codes232Standby Command (E2h/96h)233Standby Immediate Command (E0h/94h)235Write Buffer Command (E8h)236Write DMA Command (Cah/CBh)237Write DMA FUA Ext Command (3Dh)239Write DMA Ext Command (35h)241Write FPDMA Queued Command (61h)243Write Log Ext Command (3Fh)245Write Multiple Command (C5h)247Write Multiple Ext Command (39h)249Write Multiple FUA Ext Command (CEh)251Write Sector(s) Command (30h/31h)253Write Sector(s) Ext Command (34h)255Write Stream DMA Command (3Ah)257Write Stream PIO Command (3Bh)260Write Uncorrectable Ext Command (45h)263Timeout Values266Figure 1 PList physical format14Figure 2 Connector location (PATA)15Figure 3 Connector location (SATA)15Figure 4 Power connector pin assignments16Figure 5 the timing of COMRESET, COMINIT and COMWAKE21Figure 6 System reset timing chart22Figure 7 PIO cycle timings chart23Figure 8 Multiword DMA cycle timing chart25Figure 9 Ultra DMA cycle timing chart (Initiating Read)26Figure 10 Ultra DMA cycle timing chart (Host pausing Read)27Figure 11 Ultra DMA cycle timing chart (Host terminating Read)28Figure 12 Ultra DMA cycle timing chart (Device terminating Read)29Figure 13 Ultra DMA cycle timing chart (Initiating Write)30Figure 14 Ultra DMA cycle timing chart (Device Pausing Write)31Figure 15 Ultra DMA cycle timing chart (Device Terminating Write)32Figure 16 Ultra DMA cycle timing chart (Host Terminating Write)33Figure 17 Jumper pin location35Figure 18 Jumper pin identification35Figure 19 Jumper positions for normal use37Figure 20 Jumper positions for 15 logical head default38Figure 21 Jumper positions for capacity clip to 32GB39Figure 22 Jumper settings for Disabling Auto Spin40Figure 23 Limits of temperature and humidity42Figure 24 Top and side views with breather hole location and mechanical dimensions47Figure 25 Bottom and side views with mounting hole locations48Figure 26 Mounting hole locations (all dimensions are in mm)49Figure 27 Connector locations50Figure 28 Initial Setting71Figure 29 Usual Operation72Figure 30 Password Lost73Figure 31 Seek overlap78Figure 32 Device address map before and after Set Feature82Größe: 1,69 MBSeiten: 278Language: EnglishHandbuch öffnen