Datenbogen (80525PY450512)InhaltsverzeichnisTitle Page1Contents3Revision History81.0 Introduction91.1 Terminology101.1.1 S.E.C.C.2 and S.E.C.C. Packaged Processor Terminology101.1.2 Processor Naming Convention111.2 Related Documents122.0 Electrical Specifications132.1 Processor System Bus and VREF132.2 Clock Control and Low Power States142.2.1 Normal State—State 1152.2.2 AutoHALT Powerdown State—State 2152.2.3 Stop-Grant State—State 3152.2.4 HALT/Grant Snoop State—State 4162.2.5 Sleep State—State 5162.2.6 Deep Sleep State—State 6162.2.7 Clock Control172.3 Power and Ground Pins172.4 Decoupling Guidelines172.4.1 Processor VCCCORE Decoupling182.4.2 Processor System Bus AGTL+ Decoupling182.5 Processor System Bus Clock and Processor Clocking182.6 Voltage Identification182.7 Processor System Bus Unused Pins202.8 Processor System Bus Signal Groups202.8.1 Asynchronous vs. Synchronous for System Bus Signals212.8.2 System Bus Frequency Select Signal (BSEL0)222.9 Test Access Port (TAP) Connection232.10 Maximum Ratings242.11 Processor DC Specifications252.12 AGTL+ System Bus Specifications322.13 System Bus AC Specifications323.0 Signal Quality Specifications403.1 BCLK, PICCLK, and PWRGOOD Signal Quality Specifications and Measurement Guidelines403.2 AGTL+ and Non-AGTL+ Overshoot/Undershoot Specifications and Measurement Guidelines413.2.1 Overshoot/Undershoot Magnitude413.2.2 Overshoot/Undershoot Pulse Duration423.2.3 Overshoot/Undershoot Activity Factor423.2.4 Reading Overshoot/Undershoot Specification Tables433.2.5 Determining If a System Meets the Overshoot/Undershoot Specifications443.3 AGTL+ and Non-AGTL+ Ringback Specifications and Measurement Guidelines463.3.1 Settling Limit Guideline484.0 Thermal Specifications and Design Considerations494.1 Thermal Specifications504.1.1 Thermal Diode535.0 S.E.C.C. and S.E.C.C.2 Mechanical Specifications545.1 S.E.C.C. Mechanical Specifications545.2 S.E.C.C.2 Mechanical Specification615.3 S.E.C.C.2 Structural Mechanical Specification675.4 Processor Package Materials Information695.5 Intel® Pentium® III Processor Signal Listing695.6 Intel® Pentium® III Processor Core Pad to Substrate Via Assignments765.6.1 Processor Core Pad Via Assignments (CPUID=067xh)765.6.2 Processor Core Signal Assignments (CPUID=067xh)765.6.3 Processor Core Pad Via Assignments (CPUID=068xh)876.0 Boxed Processor Specifications886.1 Introduction886.2 Fan Heatsink Mechanical Specifications886.2.1 Intel® Boxed Processor Fan Heatsink Dimensions886.2.2 Intel® Boxed Processor Fan Heatsink Weight906.2.3 Intel® Boxed Processor Retention Mechanism906.3 Fan Heatsink Electrical Requirements916.3.1 Fan Heatsink Power Supply916.4 Fan Heatsink Thermal Specifications926.4.1 Intel® Boxed Processor Cooling Requirements927.0 Intel® Pentium® III Processor Signal Description937.1 Alphabetical Signals Reference937.2 Signal Summaries100Größe: 1,56 MBSeiten: 101Language: EnglishHandbuch öffnen